January 2019 Archives by date
Starting: Tue Jan 8 08:55:45 UTC 2019
Ending: Tue Jan 29 13:53:45 UTC 2019
Messages: 152
- [Cryptech-Commits] [core/hash/sha256] branch master updated: Ported the timing fix from SHA-512 to SHA-256. The core can now run at 170 MHz in the target FPGA.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated: Adding the same API hardening to keywrap as implemented for other cores after the Cryptech audit.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch master updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk_60mhz updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk_60mhz updated: Add Pavel's utility library.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk updated: Add Pavel's utility library.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch master updated: Add Pavel's utility library.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] branch master created (now 9590720)
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 01/45: Adding readme for the aes core.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 02/45: Adding license file too.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 03/45: Adding RTL source files for the AES core.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 04/45: Adding testbenchs.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 05/45: Adding Python models for AES as well as key expansion and rcon.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 06/45: Adding Makefile for building simulation targets.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 07/45: Removed obsolete target.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 08/45: Reworked the sbox and inverse sbox. Slighly smaller design and much shorter source files.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 09/45: (1) Changed ordet of status and config addresses to conform to what we have in other cores. (2) Changed to localparam to stop polluting namespace.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 10/45: (1) Changed name and version to reflect that it is not only AES-128 and that the core is fairly close to done. (2) Moved counter update.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 11/45: Corrected where config bits are.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 12/45: fix CORE_VERSION to match what we think it should be
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 13/45: Fixing text error in comment.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 14/45: whack copyrights
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 15/45: Adding support for linting the AES core.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 16/45: Synced the AES core rtl and testbench to github. The updates does not add or modify any functionality, but silence a lot of warnings, reduce code size.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 17/45: Adding the error port that went missing. Sloppy.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 18/45: Adding inital version of AES core optimized for performance.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 19/45: Adding task to wait for ready to be set. This allows us to measure the number of cycles spent doing operations.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 20/45: Adding 16 S-boxes to the encipher datapath.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 21/45: Connected the new S-boxes and collapsed the SubBytes operation into one cycle. This provides a speedup for Encipher with 2.1x.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 22/45: Removed the sword counter since it is not needed.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 23/45: Removed the sbox word mux. Removed ports for sbox access in the encipher datapath since it now has its own sboxes.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 24/45: Moved the Sbox used for key expansion into the key_mem.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 25/45: Cleaned up redundant wires.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 26/45: Increased number of inverse S-boxes to 16 and removed S-box scheduling.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 27/45: Updated core status and implementation details.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 28/45: Updated README with implementation results.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 29/45: Polished the wait_ready task to use defined bit index.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 30/45: Added wait_ready task to allow test cases to wait for the core to complete an operation. This makes it possible to measure cycles for an operation.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 31/45: Combined all AES round operations into a single operation for a round.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 32/45: Minor cleanup of states and register sizes.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 33/45: Updated README with latest implementation results and status for the core.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 34/45: Added missing implementation results for Xilinx Artix7.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 35/45: Shaved off another cycle for block processing.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 36/45: Added CC_FLAGS and LINT_FLAGS.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 37/45: Added a test case for AES with test vectors from processing NIST KWP keywrap operation. This verifies that we are using the AES core correctly in the keywrap core. But it is a new test vector for AES too.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 38/45: (1) Added NIST KWP test to core. (2) Moved all other tests in core tb to a separate task. (3) Minor cleanup in top tb.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 39/45: Added missing reset of registers. This fixes CT-01-001 FPGA.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 40/45: Reading AES result will be zero when ready is not set.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 41/45: Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 42/45: Adding restriction to the API to only allow writes to controlling registers. This fixes CT-01-002 FPGA.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 43/45: Added the regs missing in reset also in the old aes core.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 44/45: For completeness sake added API hardening to the aes core too. The AES core has been replaced with the aes_speed core but is still available as a separate repo.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 45/45: Clean-up ill-advised fork of core/cipher/aes.
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] tag aes-speed-was-forked-from-here created (now 2caa4d5)
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] tag root-of-aes-speed created (now e389761)
git at cryptech.is
- [Cryptech-Commits] [user/sra/aes_merged] 01/01: Adding inital version of AES core optimized for performance.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] branch master updated (1ad1120 -> 9590720)
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 01/21: Adding inital version of AES core optimized for performance.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 02/21: Adding task to wait for ready to be set. This allows us to measure the number of cycles spent doing operations.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 03/21: Adding 16 S-boxes to the encipher datapath.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 04/21: Connected the new S-boxes and collapsed the SubBytes operation into one cycle. This provides a speedup for Encipher with 2.1x.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 05/21: Removed the sword counter since it is not needed.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 06/21: Removed the sbox word mux. Removed ports for sbox access in the encipher datapath since it now has its own sboxes.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 07/21: Moved the Sbox used for key expansion into the key_mem.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 08/21: Cleaned up redundant wires.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 09/21: Increased number of inverse S-boxes to 16 and removed S-box scheduling.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 10/21: Updated core status and implementation details.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 11/21: Updated README with implementation results.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 12/21: Polished the wait_ready task to use defined bit index.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 13/21: Combined all AES round operations into a single operation for a round.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 14/21: Minor cleanup of states and register sizes.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 15/21: Updated README with latest implementation results and status for the core.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 16/21: Shaved off another cycle for block processing.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 17/21: Added missing reset of registers. This fixes CT-01-001 FPGA.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 18/21: Reading AES result will be zero when ready is not set.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 19/21: Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 20/21: Adding restriction to the API to only allow writes to controlling registers. This fixes CT-01-002 FPGA.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 21/21: Clean-up ill-advised fork of core/cipher/aes.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] branch aes_speed created (now 963e729)
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 01/20: Adding inital version of AES core optimized for performance.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 02/20: Adding task to wait for ready to be set. This allows us to measure the number of cycles spent doing operations.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 03/20: Adding 16 S-boxes to the encipher datapath.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 04/20: Connected the new S-boxes and collapsed the SubBytes operation into one cycle. This provides a speedup for Encipher with 2.1x.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 05/20: Removed the sword counter since it is not needed.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 06/20: Removed the sbox word mux. Removed ports for sbox access in the encipher datapath since it now has its own sboxes.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 07/20: Moved the Sbox used for key expansion into the key_mem.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 08/20: Cleaned up redundant wires.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 09/20: Increased number of inverse S-boxes to 16 and removed S-box scheduling.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 10/20: Updated core status and implementation details.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 11/20: Updated README with implementation results.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 12/20: Polished the wait_ready task to use defined bit index.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 13/20: Combined all AES round operations into a single operation for a round.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 14/20: Minor cleanup of states and register sizes.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 15/20: Updated README with latest implementation results and status for the core.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 16/20: Shaved off another cycle for block processing.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 17/20: Added missing reset of registers. This fixes CT-01-001 FPGA.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 18/20: Reading AES result will be zero when ready is not set.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 19/20: Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] 20/20: Adding restriction to the API to only allow writes to controlling registers. This fixes CT-01-002 FPGA.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated: Fixed parameterized widths.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated: Adding test case that verifies that SW can keep a key alive by reading status register.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated: Add testcase that verifies forced zeroisation.
git at cryptech.is
- [Cryptech-Commits] [sw/stm32] branch rsa_timing created (now 44dc84d)
git at cryptech.is
- [Cryptech-Commits] [sw/stm32] 01/01: Timing tests for RSA signing and sub-components thereof.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch master updated: Add include directives for Pavel's .vh files.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch master updated: .vh search path and aes_speed un-fork.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch fmc_clk updated: Add include directives for Pavel's .vh files.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk updated: .vh search path and aes_speed un-fork.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch fmc_clk_60mhz updated: Add include directives for Pavel's .vh files.
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk_60mhz updated: .vh search path and aes_speed un-fork.
git at cryptech.is
- [Cryptech-Commits] [sw/stm32] branch rsa_timing updated: Initialize C_len arg to hal_aes_keywrap, or suffer unpredictable failures.
git at cryptech.is
- [Cryptech-Commits] [core/cipher/aes] branch master updated: Bump the version number, because new code.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated: Adding key timeout output port to allow core to inform the top level wrapper that timeout has occured. Added functionality to zeroise API key registers when timout has happened. Updated all auto_zeroise test cases to check that API key registers are properly zeroised.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch auto_zeroise updated (4b8d7ab -> f7c9cd1)
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] 01/02: Debugging keywrap after auto_zeroise. Now the core starts processing as expected.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] 02/02: Added non-zero default timeout value in core. This fixes the keywrap problems by not automatically reset the key in the API. Enabled all testcases and disabled excessive debug outputs.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch master updated (e28feca -> fe3d53c)
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 01/02: Corrected target device.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 02/02: Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0 (which he only committed on fmc_clk, and I was only looking at master).
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch fmc_clk updated: Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0 (which he only committed on fmc_clk, and I was only looking at master).
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch fmc_clk_60mhz updated: Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0 (which he only committed on fmc_clk, and I was only looking at master).
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch js_keywrap updated: Cherry-pick 8cd28d0/fe3d53c: Added `include directories to Makefile.
git at cryptech.is
- [Cryptech-Commits] [core/platform/common] branch js_keywrap updated (1655852 -> 53b9b7b)
git at cryptech.is
- [Cryptech-Commits] [core/platform/common] 01/04: Add support for Joachim's keywrap core.
git at cryptech.is
- [Cryptech-Commits] [core/platform/common] 02/04: core.cfg [project keywrap]: We want two modexp cores for parallel CRT (and we fail badly if we don't get them). Also add ecdsa cores, so we can meaningfully compare results vs stock bitstream.
git at cryptech.is
- [Cryptech-Commits] [core/platform/common] 03/04: Track Joachim's latest keywrap core - unroll bank-switched memory into a number of core register blocks.
git at cryptech.is
- [Cryptech-Commits] [core/platform/common] 04/04: Rebase js_keywrap from master
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch fmc_clk_60mhz updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [releng/alpha] branch master updated: Catch up with submodules
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch master updated (fe3d53c -> 1526cfd)
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 01/06: Use default synthesis options.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 02/06: 1. Disabled SmartGuide as it can thwart reproducible implementation. 2. Enabled multi-threading for MAP and PAR, the corresponding switch is -mt. MAP supports -mt off|2, PAR supports -mt off|2|3|4. Please revert back to -mt off if the build system has only two cores.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 03/06: Add explicit check for timing failure, per Pavel.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 04/06: Remove `-global_opt off` per discussion with Joachim and Pavel.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 05/06: Comment smartguide out of Makefile, not just out of shell script.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 06/06: Generate detailed timing report when PAR fails.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] branch js_keywrap updated (36e8f3d -> bf5f995)
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 01/06: Use default synthesis options.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 02/06: 1. Disabled SmartGuide as it can thwart reproducible implementation. 2. Enabled multi-threading for MAP and PAR, the corresponding switch is -mt. MAP supports -mt off|2, PAR supports -mt off|2|3|4. Please revert back to -mt off if the build system has only two cores.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 03/06: Add explicit check for timing failure, per Pavel.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 04/06: Remove `-global_opt off` per discussion with Joachim and Pavel.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 05/06: Comment smartguide out of Makefile, not just out of shell script.
git at cryptech.is
- [Cryptech-Commits] [core/platform/alpha] 06/06: Generate detailed timing report when PAR fails.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch master updated (6cfcc1e -> f7c9cd1)
git at cryptech.is
- [Cryptech-Commits] [core/rng/trng] branch cleanup created (now e786303)
git at cryptech.is
- [Cryptech-Commits] [core/rng/trng] branch cleanup updated: Added flags for building and linting source.
git at cryptech.is
- [Cryptech-Commits] [core/rng/rosc_entropy] branch master updated: Updated CC and Lint flags. Updated make help.
git at cryptech.is
- [Cryptech-Commits] [user/js/vndecorrelator] branch master created (now 15580aa)
git at cryptech.is
- [Cryptech-Commits] [user/js/vndecorrelator] 01/01: Adding Von Neumann decorrelator core to Cryptech.
git at cryptech.is
- [Cryptech-Commits] [user/js/keywrap] branch master updated: Updated README to current status. Added section about the auto zeroise functionality that has been merged. Moved sections around to be in a (hopefully) more pedagogical order.
git at cryptech.is
Last message date:
Tue Jan 29 13:53:45 UTC 2019
Archived on: Tue Jan 29 13:53:49 UTC 2019
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