[Cryptech-Commits] [user/sra/aes_merged] branch master created (now 9590720)

git at cryptech.is git at cryptech.is
Wed Jan 9 16:32:17 UTC 2019


This is an automated email from the git hooks/post-receive script.

sra at hactrn.net pushed a change to branch master
in repository user/sra/aes_merged.

      at 9590720  Clean-up ill-advised fork of core/cipher/aes.

This branch includes the following new commits:

     new b4eeece  Adding readme for the aes core.
     new be15776  Adding license file too.
     new 1ecc3b5  Adding RTL source files for the AES core.
     new c6dbd00  Adding testbenchs.
     new 964b1ec  Adding Python models for AES as well as key expansion and rcon.
     new 2b4e7eb  Adding Makefile for building simulation targets.
     new 994090d  Removed obsolete target.
     new b07918a  Reworked the sbox and inverse sbox. Slighly smaller design and much shorter source files.
     new 241a101  (1) Changed ordet of status and config addresses to conform to what we have in other cores. (2) Changed to localparam to stop polluting namespace.
     new d35e060  (1) Changed name and version to reflect that it is not only AES-128 and that the core is fairly close to done. (2) Moved counter update.
     new fc8c932  Corrected where config bits are.
     new c8271a6  fix CORE_VERSION to match what we think it should be
     new d44bb7e  Fixing text error in comment.
     new 9157592  whack copyrights
     new 67cd02c  Adding support for linting the AES core.
     new 0361065  Synced the AES core rtl and testbench to github. The updates does not add or modify any functionality, but silence a lot of warnings, reduce code size.
     new 2caa4d5  Adding the error port that went missing. Sloppy.
     new 24b85c9  Adding inital version of AES core optimized for performance.
     new f3314ff  Adding task to wait for ready to be set. This allows us to measure the number of cycles spent doing operations.
     new cbf595b  Adding 16 S-boxes to the encipher datapath.
     new 5bf8bd4  Connected the new S-boxes and collapsed the SubBytes operation into one cycle. This provides a speedup for Encipher with 2.1x.
     new b25a4d4  Removed the sword counter since it is not needed.
     new 1da0928  Removed the sbox word mux. Removed ports for sbox access in the encipher datapath since it now has its own sboxes.
     new 577a8c7  Moved the Sbox used for key expansion into the key_mem.
     new 2fc6cc9  Cleaned up redundant wires.
     new 61f2ceb  Increased number of inverse S-boxes to 16 and removed S-box scheduling.
     new 6baf074  Updated core status and implementation details.
     new c596c2f  Updated README with implementation results.
     new 3bc7454  Polished the wait_ready task to use defined bit index.
     new e747458  Added wait_ready task to allow test cases to wait for the core to complete an operation. This makes it possible to measure cycles for an operation.
     new f94d773  Combined all AES round operations into a single operation for a round.
     new 59c5def  Minor cleanup of states and register sizes.
     new 74e0f67  Updated README with latest implementation results and status for the core.
     new 83d7c24  Added missing implementation results for Xilinx Artix7.
     new fd40ab8  Shaved off another cycle for block processing.
     new 4c94cf2  Added CC_FLAGS and LINT_FLAGS.
     new fa155de  Added a test case for AES with test vectors from processing NIST KWP keywrap operation. This verifies that we are using the AES core correctly in the keywrap core. But it is a new test vector for AES too.
     new 98cc06b  (1) Added NIST KWP test to core. (2) Moved all other tests in core tb to a separate task. (3) Minor cleanup in top tb.
     new 1ef4aa6  Added missing reset of registers. This fixes CT-01-001 FPGA.
     new 717f11e  Reading AES result will be zero when ready is not set.
     new 00f01ac  Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.
     new 833921d  Adding restriction to the API to only allow writes to controlling registers. This fixes CT-01-002 FPGA.
     new 277c73b  Added the regs missing in reset also in the old aes core.
     new 1ad1120  For completeness sake added API hardening to the aes core too. The AES core has been replaced with the aes_speed core but is still available as a separate repo.
     new 9590720  Clean-up ill-advised fork of core/cipher/aes.

The 45 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "add" were already present in the repository and have only
been added to this reference.




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