[Cryptech-Commits] [core/platform/alpha] branch fmc_clk_60mhz updated: Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0 (which he only committed on fmc_clk, and I was only looking at master).

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paul at psgd.org pushed a commit to branch fmc_clk_60mhz
in repository core/platform/alpha.

The following commit(s) were added to refs/heads/fmc_clk_60mhz by this push:
     new 516b297  Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0 (which he only committed on fmc_clk, and I was only looking at master).
516b297 is described below

commit 516b2975958b05c72f573c37c075e5793c514101
Author: Paul Selkirk <paul at psgd.org>
AuthorDate: Tue Jan 22 19:39:09 2019 -0500

    Upon reflection, I prefer the way Pavel handled include paths in 8cd28d0
    (which he only committed on fmc_clk, and I was only looking at master).
    
    But I moved the curly brackets from Makefile to xilinx.mk, because
    a) Makefile shouldn't need to know the picky details of xst option
    syntax, and
    b) xst will throw an uninformative error if called with '-vlgincdir '
    versus '-vlgincdir {}', if vlgincdir isn't defined in Makefile.
---
 build/Makefile   | 4 ++++
 build/xilinx.mk  | 1 +
 build/xilinx.opt | 1 -
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/build/Makefile b/build/Makefile
index f573ace..60e55f9 100644
--- a/build/Makefile
+++ b/build/Makefile
@@ -18,6 +18,10 @@ isedir		= /opt/Xilinx/14.7/ISE_DS
 xil_env		= . $(isedir)/settings$(WORD_SIZE).sh
 ucf		?= ../ucf/$(project).ucf
 
+# Verilog include directories, if needed
+
+vlgincdir	= $(CORE_TREE)/lib/lowlevel $(CORE_TREE)/math/ecdsalib/rtl/microcode
+
 all:	$(project).bit
 
 # Build the default core_selector if it doesn't already exist.
diff --git a/build/xilinx.mk b/build/xilinx.mk
index 9af9366..4bfefde 100644
--- a/build/xilinx.mk
+++ b/build/xilinx.mk
@@ -154,6 +154,7 @@ $(project).scr: $(optfile) $(mkfiles) ./xilinx.opt
 	echo "-top $(top_module)" >> $@
 	echo "-ifn $(project).prj" >> $@
 	echo "-ofn $(project).ngc" >> $@
+	echo "-vlgincdir {$(vlgincdir)}" >> $@
 	cat ./xilinx.opt $(optfile) >> $@
 junk += $(project).scr
 
diff --git a/build/xilinx.opt b/build/xilinx.opt
index 933f7df..1ac8957 100644
--- a/build/xilinx.opt
+++ b/build/xilinx.opt
@@ -45,4 +45,3 @@
 -iob auto
 -equivalent_register_removal YES
 -slice_utilization_ratio_maxmargin 5
--vlgincdir {../../../lib/lowlevel ../../../math/ecdsalib/rtl/microcode}

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