[Cryptech-Commits] [core/cipher/aes] 19/21: Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.

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sra at hactrn.net pushed a commit to branch master
in repository core/cipher/aes.

commit 00f01ac229e822f1fd6577c27b0e3012983368b0
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Wed Oct 3 09:01:20 2018 +0200

    Adding testcase that tests the mangling of aes operations by switching from encipher to decipher mid-operation.
---
 src/tb/tb_aes.v | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/src/tb/tb_aes.v b/src/tb/tb_aes.v
index 35fc1d9..84be6a8 100644
--- a/src/tb/tb_aes.v
+++ b/src/tb/tb_aes.v
@@ -428,6 +428,59 @@ module tb_aes();
   endtask // ecb_mode_single_block_test
 
 
+  //----------------------------------------------------------------
+  // single_block_mangle_test()
+  //
+  // Perform single block test, but try to mangle the operation
+  // by changing from encryption to decryption mid-processing.
+  // This should cause errors unless changes to config during
+  // processing.
+  //----------------------------------------------------------------
+  task single_block_mangle_test(input [7 : 0]  tc_number,
+                               input [255 : 0] key,
+                               input [127 : 0] block,
+                               input [127 : 0] expected);
+    begin
+      $display("*** TC %0d mangle test started.", tc_number);
+      tc_ctr = tc_ctr + 1;
+
+      init_key(key, AES_128_BIT_KEY);
+      write_block(block);
+      dump_dut_state();
+
+      // Set that we want to encipher and start processing.
+      $display("*** Staring encipher operation");
+      write_word(ADDR_CONFIG, (8'h00 + (AES_128_BIT_KEY << 1) + AES_ENCIPHER));
+      write_word(ADDR_CTRL, 8'h02);
+
+      // Wait a number of cycles and then switch from encipher to decipher.
+      #(10 * CLK_PERIOD);
+      $display("*** Switching to decipher operation");
+      write_word(ADDR_CONFIG, (8'h00 + (AES_128_BIT_KEY << 1) + AES_DECIPHER));
+
+      wait_ready();
+      $display("*** Ready has been set!");
+      dump_dut_state();
+      read_result();
+
+      if (result_data == expected)
+        begin
+          $display("*** TC %0d successful.", tc_number);
+          $display("");
+        end
+      else
+        begin
+          $display("*** ERROR: TC %0d NOT successful.", tc_number);
+          $display("Expected: 0x%032x", expected);
+          $display("Got:      0x%032x", result_data);
+          $display("");
+
+          error_ctr = error_ctr + 1;
+        end
+    end
+  endtask // ecb_mode_single_block_test
+
+
   //----------------------------------------------------------------
   // aes_test()
   //
@@ -527,6 +580,12 @@ module tb_aes();
 
       ecb_mode_single_block_test(8'h17, AES_DECIPHER, nist_aes256_key, AES_256_BIT_KEY,
                                  nist_ecb_256_enc_expected3, nist_plaintext3);
+
+
+      $display("Block processing mangling test");
+      $display("------------------------------");
+      single_block_mangle_test(8'h18, nist_aes128_key, nist_plaintext0,
+                               nist_ecb_128_enc_expected0);
     end
   endtask // aes_test