[Cryptech Tech] Introduction

[Joachim Strömbergson]

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Aloha!


Peter Stuge wrote:
> Hi Jason,
> 
> Great that you're interested in helping out!
> 
> Jason van Aardt wrote:
>> Using the Gigabit Serdes on the Artix, it would be possible to 
>> include two Gigabit ethernet ports
> 
> One conscious design decision of Cryptech HDL is to remain hardware 
> agnostic as long as there isn't a VERY good reason to use specific 
> hardware. The HDL is supposed to also be maximally useful for other 
> FPGAs, as well as ASIC processes.

(That at least was the conscious design decision)


Earlier in the project there were at least a temporary
need/interest/demand for a PCIe version. At that time we looked at using
one of the available PCIe FPGA boards such as the NetFPGA boards and the
TR5-Lite from Terasic:

http://netfpga.org/site/#/
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=158&No=856

Those boards are kidney transplant-expensive though.

For those boards there is host drivers (templates) etc available that
can at least be used to start developing the needed interfaces.


For Ethernet (Fast or GbE) the situation should not be that hard. We
could possibly use GPIOs to connect to a board that provides MAC/PHY
over GMII, for example.

There are several boards that could be used for prototyping. And we can
then design an adapted board.

We should be able to at least support one Ethernet interface to allow
something else besides USB and higher data rate than what we get with
the USB interfaces we currently have.

Two Ethernet interfaces, then we may have to redesign the current board
to be able to have the high speed I/O routed as needed.


Yours
JoachimS

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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