[Cryptech Tech] debug output from cores?

[Rob Austein]

At Mon, 05 Oct 2015 09:33:07 +0200, Joachim Strömbergson wrote:
> 
> The rng cores (avalanche_entropy, rosc_entropy, trng) all sports a debug
> port. The purpose of that port is/was to be able to get some data out
> from the FPGA to see that the entropy sources and trng is alive even
> though the CPU might be missing.
> 
> But do we really need these ports still?

I don't think software has any particular need for ports that are
there to support testing when the software is absent. :)