[Cryptech Tech] Fwd: Second hash via EIM

[Joachim Strömbergson]

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Aloha!

Paul Selkirk wrote:
> On 02/08/2015 06:56 PM, Шатов Павел wrote:
>> 4c. I have disconnected .error() output from cores. As far as I 
>> understand it gets asserted when some non-existent register is
>> being addressed. In most projects that I've seen writes to empty
>> regions of memory are discarded and reads return zeroes. If you
>> really need this kind of error checking, please re-connect this
>> output as needed.
> 
> I'm all for simplifying the design.

Note that the error signal does more than detect access to non-existent
variables, it detects access violations. Writes to read only registers
for example. This is actually not that uncommon to have, esp in security
related designs. That is why I added those ports. But if we don't
concern us with access violations

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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