[Cryptech Tech] Fwd: Second hash via EIM

[Павел Шатов]

On 03.03.2015 13:13, Joachim Strömbergson wrote:
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> Aloha!
>
> Paul Selkirk wrote:
>> On 02/08/2015 06:56 PM, Шатов Павел wrote:
>>> 4c. I have disconnected .error() output from cores. As far as I
>>> understand it gets asserted when some non-existent register is
>>> being addressed. In most projects that I've seen writes to empty
>>> regions of memory are discarded and reads return zeroes. If you
>>> really need this kind of error checking, please re-connect this
>>> output as needed.
>>
>> I'm all for simplifying the design.
>
> Note that the error signal does more than detect access to non-existent
> variables, it detects access violations. Writes to read only registers
> for example. This is actually not that uncommon to have, esp in security
> related designs. That is why I added those ports. But if we don't
> concern us with access violations

Joachim, as I wrote this piece of code, I did not understand the way 
.error() output was supposed to be used. There were no references to it 
in the original hash_tester.c, so I just disconnected it, because it was 
not used anywhere at the moment.

If we are actually concerned about access violations, then we should 
re-connect it. The only problem is to decide what to do with this access 
violation signal. It gets asserted when there's something wrong with the 
CPU (it tries to write to a read-only register in the FPGA, it tries to 
read from a non-existent register, etc). What do we want to do when we 
see this signal?

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With best regards,
Pavel Shatov