[Cryptech Tech] Updated novena noise board

Fredrik Thulin fredrik at thulin.net
Tue Jun 2 20:55:48 UTC 2015


On Tuesday, June 02, 2015 08:45:25 PM Павел Шатов wrote:
...
> Good job, Fredrik!

Thanks Pavel, it means a lot for me to hear that from you =).

It has been a great couple of days, I've learned a lot from you guys.

> I only have some minor suggestions:
> 
> Top layer:
> 1. Try to place vias as close to capacitor pads as possible and try not
> to share vias between components.
> 
> Bottom layer (mostly aesthetics)
> 1. I would have made those traces wider to remove that thin "tongue"
> between them.
> 2. I usually pour places like that with solid shapes to avoid such
> "comb" patterns.
> 3. I try to avoid this type of copper islands, but its a matter of
> taste. You can ignore them.

I did a final (famous last words, right?) touch up of the board incorporating 
most of these changes, and re-routed the 3V3 trace that snaked around the 
outline of other components a little bit too much for my personal satisfaction 
(also now it doesn't cross over the noise-out signal on the bottom layer, not 
that I know if it would have mattered or not - better safe than sorry).

> I also agree with what Jacob wrote regarding RefDes. I believe, they are
> necessary. Try to place them in such a way, that they are readable and
> not obscured by components after assembly.

For general PCBs, I agree with you and Jacob that there should be RefDes on 
the the board.

This is more a show-case board though, and as Peter said a big difference 
against most boards is that for this board people can/should actually have a 
copy of the blueprints.

If someone wants to do another PCB run sometime then they get to decide what 
goes on the silk screen of their boards =).

/Fredrik
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