[Cryptech Tech] Updated novena noise board

[Павел Шатов]

On 01.06.2015 23:36, Fredrik Thulin wrote:
> I have now updated the rev03 board with almost all the suggestions I've gotten
> from my kind reviewers Jacob, Peter, Pavel and bunnie.
>
> I've also hopefully sorted out how to generate Gerbers properly - at least the
> attached Gerbers loads just fine with the nifty online 3D viewer at
> http://mayhewlabs.com/3dpcb (try it, really cool!) and online renderings from
> two PCB houses look OK, and it looks good (to me) with the 'gerbv' Linux
> viewer.
>
> I'm not expecting more review, but if someone wants to take another look I
> won't object =).
>
> One comment below:
>
> On Friday, May 29, 2015 02:00:07 AM Jacob wrote:
> ...
>>>> 6. Should design in some openings in the soldemask of the connector pads.
>>>> As it is now, there is a danger of shorts during assembly.
>>>
>>> Sorry, this one I don't understand?
>>
>> If you look at the Soldermask and copper Gerbers where the big connector
>> is mounted, you see that the Solder Mask (SM) for each connector pin is
>> overlapping its neighbor, which means no soldermask dam between pins,
>> which means a possible danger of solder shorts during assembly.
>
> Thanks for all the good explanations and examples Jacob - I really appreciate
> it.
>
> I think there are gaps in the solder mask (see attached picture), so I'm
> hoping this comment was due to bad Gerber generation earlier. I've checked the
> footprint in Eagle and the pads do have the "Stop" checkbox checked.
>
> /Fredrik


Good job, Fredrik!

I only have some minor suggestions:

Top layer:
1. Try to place vias as close to capacitor pads as possible and try not 
to share vias between components.

Bottom layer (mostly aesthetics)
1. I would have made those traces wider to remove that thin "tongue" 
between them.
2. I usually pour places like that with solid shapes to avoid such 
"comb" patterns.
3. I try to avoid this type of copper islands, but its a matter of 
taste. You can ignore them.

I also agree with what Jacob wrote regarding RefDes. I believe, they are 
necessary. Try to place them in such a way, that they are readable and 
not obscured by components after assembly.

-- 
With best regards,
Pavel Shatov
-------------- next part --------------
A non-text attachment was scrubbed...
Name: Top.jpg
Type: image/jpeg
Size: 183647 bytes
Desc: not available
URL: <https://lists.cryptech.is/archives/tech/attachments/20150602/4aa7ea37/attachment-0002.jpg>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: Bot.jpg
Type: image/jpeg
Size: 104321 bytes
Desc: not available
URL: <https://lists.cryptech.is/archives/tech/attachments/20150602/4aa7ea37/attachment-0003.jpg>