[Cryptech Core] Clocking the FPGA using the FMC SRAM clock?

Joachim Strömbergson joachim at secworks.se
Mon Jun 1 12:03:20 UTC 2015


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Aloha!

Pavel Shatov wrote:
> The same situation may be true for STM32F4, I haven't checked,
> whether it supports continuous clocking of memory or not.

You can drive the FMC clock continuously - when the clock (and AHB and
FMC) has been enabled. But that means the CPU must be up and runninh and
those configuration writes has been executed. I.e. boot and operation of
cores in the FPGA hinges on the fact that the CPU has booted (and not in
sleep mode). Not sure we want that.


> Not that I'm opposed to your idea, but I somehow don't see major 
> benefits from it. By using DCM to boost core clock, we will still end
> up with two clock domains.

- From the same source, and with 2x relation, makes for easy CDC. The
benefit would be one less clock. But that is basically it, and would
probably mess up how we want to boot and operate the FPGHA. Forget it.


> Most FPGA designs that I've seen, have dedicated reference clock 
> generator for FPGA. I suggest, that we stick with our current Alpha 
> board drawing and keep that 50 MHz oscillator.

Yep.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
========================================================================
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