[Cryptech Core] Clocking the FPGA using the FMC SRAM clock?

[Joachim Strömbergson]

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Aloha!

Was thinking about the FPGA clocking on the Alpga board.

Pavel, what do you think about using the FMC SRAM source clock as source
for core clock? Running the cores at 90 MHz might be hard. Half speed
should be no problem and make for easy synch with the external
interface, but will be a slower than what we have on the Novena. 3/4
(using DCM scaling) puts us above Novena and should still allow us to
use a single source clock.

The one drawback I see is that the FPGA can't be started before the M4
is up and running... Might not be that good.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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