[Cryptech-Commits] [staging/core/comm/uart] 11/13: Adding a note about the new ability to change bit rate as well as number of data- and stop bits.

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paul at psgd.org pushed a commit to branch master
in repository staging/core/comm/uart.

commit 10fb68d2e111502ecfd86083b3f8143b661d0406
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Fri May 9 13:14:17 2014 +0200

    Adding a note about the new ability to change bit rate as well as number of data- and stop bits.
---
 README.md | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/README.md b/README.md
index 5361cd0..513ccf0 100644
--- a/README.md
+++ b/README.md
@@ -6,4 +6,9 @@ A Universal asynchronous receiver/transmitter (UART) implemented in Verilog.
 This UART used to be in coretest, but has been moved out as a separate
 project.
 
+The current implementation supports the ability to set the bit rate as
+well as number of data- and stop bits by writing to control addresses
+via the control interface.
+
+