[Cryptech Tech] Selection of Lattice FPGA as key memory for the Alpha board

[Peter Stuge]

Pavel Shatov wrote:
> I believe, the plan was outlined during the "restart" call we had last year.

Sorry, yes, my question was focused on tooling.


> I'm doing the edits in KiCad. I must admit, Fredrik did excellent job 
> converting the design to KiCad.

I agree that Fredrik has done an excellent job, but last time I had
the files open I still noticed a couple of points that should probably
be addressed sooner rather than later, but I still think it would be wise
to validate the conversion with a small production before going ahead
with edits.

But with grant deadlines maybe there is no more time for that, and since
the edits are smallish that validation can be done with edits as well.

Anyway I would certainly recommend to *not* expect that the first production
of KiCad files will actually work. It might, but better not rely on it.

While on the conversion topic I recently learned that KiCad nightly builds
can import Altium files directly. The import I saw was LimeSDR and it looked
very good. Because LimeSDR may be a slightly more advanced design than our
rev03 I've been wanting to test this, but I haven't gotten to it just yet.


> > Also more generally; I've noticed another signal that I would like to
> > have added to the UART daughterboard headers; DTR.
> 
> I see that you've sent a couple of e-mails to the list regarding your 
> UART solution recently. I did try to figure out all the implications, 
> but I'm not sure I have all the details in my head.

Fair enough.

> How about we schedule a call with you and maybe Joachim and anyone else
> interested some time this weekend (maybe Zoom or something else with
> screen sharing) to discuss it in more detail?

I think a call this weekend to go through details would be great. I'm not
really able to participate in screen sharing though (my computer is old
and current web technology is sometimes incomptabile) but I also don't
have anything visual to share. :)

I could draw a simple schematic and send a PDF around before a call, but
it would just have the same information as my email with the pin and signal
table, plus the latest DTR addition.


> >> LP/HX/LM devices don't have internal oscillators, so they all need
> >> an external clock crystal.
> > 
> > Would it be possible to create a ring oscillator in logic in those devices?
> 
> This was my first thought when I discovered LP/HX/LM don't have built-in 
> oscillators. I believe a ring oscillator should work, but it's more 
> about black magic, and I'm not sure master key memories and black magic mix.

I agree that it shouldn't be the only MKM oscillator, but I think it would
be interesting and useful to combine several oscillator types, internal as
well as external, and have them monitor each other.


> Ultra and UltraLite aren't supported by the IceStorm toolsuite, so it's 
> either UltraPlus 3K or 5K.

Ah, I missed that. I guess that might be simple to change, but yes,
then we'll have to use UltraPlus for now, if we want an internal oscillator
that isn't a ring oscillator.


> I'm tempted by the 5K. Yes, it's large, but it's available in QFN package.
> 3K only comes in that tiny chip-scale BGA, I'm not sure how to breakout
> without blind or buried vias.

I agree with using the QFN package. Have you noticed if all three Ultra
variants are pin compatible? This would mean more options in the future.


//Peter