[Cryptech Tech] Seeking comments on a proposal for changes to the Cryptech RNG design.

[Joachim Strömbergson]

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Aloha!

Joachim Strömbergson wrote:
> yes, or more correctly the chained 64-bit ALU ops. In SHA-512 there
> are a chain of three 64-bit adders in the worst path (and the carry
> will be the longest through it all). See op-chain in the attached
> image.

I've actuall been playing around with implementing operations in FPGAs
just to see how good the dev tools and the FPGA tech are. Basically what
resources and performance you get when simply writing a "*" or "+" for
various operands. So far I've focused on multipliers:

https://github.com/secworks/verilogtest/tree/master/multipliers

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Assured AB
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