[Cryptech Tech] Alpha layout done (not a joke)

[Pavel Shatov]

On 01.04.2016 19:57, Jacob wrote:
>
> Thanks.
>
> - When do you plan to send the files out for fabrication?

So far the scheduled date is the 11th of April. This leaves around a
week for review. Sending of files for fabrication can be delayed of
course, if we find something critical that takes time to fix.

> - Will you ask for layout corrections if not show stoppers?

Yes, we want to collect feedback, then fix critical things and
re-generate Gerbers.

> It will take days to do a proper review. From a rudimentary check:
>
> 1. I could not find Fiducials on the board for the pick&place
> assembly machine.

Yes, good point! Thank you. How many of them are necessary? Two near the
FPGA in a diagonal fashion?

> 2. USB traces / ESD protection can be improved. No show stopper
> though. What's the purpose of J2/J3?
>
> Jacob
>
> On 4/1/2016 6:11 PM, Fredrik Thulin wrote:
>> On Friday, April 01, 2016 06:05:56 PM Jacob wrote:
>>> Hello Fredrik,
>>>
>>> 1.Could you please provide all the fab files (Gerbers, drill etc)
>>> in one zip file?
>>>
>>> 2.Could you also please provide the BOM?
>>
>> Absolutely, attached to this e-mail.
>>
>> /Fredrik
>>
>
>
> _______________________________________________ Tech mailing list
> Tech at cryptech.is https://lists.cryptech.is/listinfo/tech


-- 
With best regards,
Pavel Shatov