[Cryptech Tech] Paper on Verilog includes localparams etc

[Rob Austein]

At Thu, 01 Oct 2015 12:42:20 +0200, Joachim Strömbergson wrote:
> 
> Here is a good paper by Cummings on defines, includes, parameters in
> Verilog.

Reads like coming into the middle of a sectarian dispute in somebody
else's religion.  I promise I was not going to use defparam, honest.

What I get from this is that the preferred structure is something
along the general lines of:

  `ifndef _BLARG_API_VH_
  `define _BLARG_API_VH_

   localparam fred   = 4'h1;
   localparam barney = 4'h2;
   localparam wilma  = 4'h4;
   localparam betty  = 4'h8;

   `endif

That is: use localparam to define the constants, and protect against
multiple inclusion as one would in C.