[Cryptech Tech] goals / use cases

Peter Gutmann pgut001 at cs.auckland.ac.nz
Wed Jan 28 08:27:59 UTC 2015


=?ISO-8859-1?Q?Joachim_Str=F6mbergson?= <joachim at secworks.se> writes:

>If we want to get going fast and rather start experimenting than doing
>measurements and planning, by getting a roomy and fast CPU, we should do the
>same with the FPGA.

In terms of a "roomy and fast CPU", the TI CPU that was mentioned earlier
already has onboard crypto support for AES and SHA (and other stuff as well),
if it's supported by the host CPU is there any need to do the same in an FPGA?
By leaving the host to do bulk encryption operations you could save space in
the FPGA for things the host can't do natively.

Peter.


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