[Cryptech Tech] goals / use cases

Joachim Strömbergson joachim at secworks.se
Wed Jan 28 08:09:04 UTC 2015


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Aloha!

Randy Bush wrote:
>> Fredrik actually suggested that if we are afraid that our design 
>> wont fit in the C7, we can take _two_ FPGAs. I think it is a 
>> splendid idea.
> 
> really?  you are that worried about the c7.  tim's curve 25519 scared
> you?

Yes and no. If we want to get going fast and rather start experimenting
than doing measurements and planning, by getting a roomy and fast CPU,
we should do the same with the FPGA.

The C7 is 1.8x bigger than the C5. It is a lot, but _may_ be tight, esp
if we just want to through cores in there and work on getting the
functionality in place rather than optimize to fit. We could go for the
C9 which is about 4x in size, but then we need to start paying for the
FPGA tools (1995 for one seat Windows version.)

Instead we can just take two C7 FPGAs and have the be connected to each
other. We can than later optimize for space. Fast and roomy now,
optimized and compact later. Bridging the FPGAs will add some
complexity, but since the cores are self contained coprocessors it
should be fairly easy to move some of them into one FPGA and others to
the second. And then have a common interface towards the CPU in on of
the FPGAs. I assume that the FPGAs share the external clock source.

And yes, the Curve25519 core scared me.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
========================================================================
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