[Cryptech Tech] PCB prototyping machine [Was: BCP prototyping machine]

[Benedikt Stockebrand]

Hi Joachim, Pavel and list,

Joachim Strömbergson <joachim at secworks.se> writes:

> Павел Шатов wrote:
>> Current EIM arbiter implementation takes on average 12 BCLK cycles
>> to transfer 32 bits of data over EIM. BCLK is now 33 MHz, so the raw 
>> bandwidth is about 10 megabytes per second right now. This can be 
>> increased if necessary by changing BCLK to 66 or 133 MHz and
>> switching to separate address/data mode from multiplexed address/data
>> mode.

hmm, considering some old 66 MHz PCI-X cards I've got lying around
somewhere at least 33 MHz should be reasonably pluggable.

> We seem to be thinking in the same direction. ;-)

Tends to happen in this project:-)

> Lets crank the EIM interface up a bit for the alpha board without
> adding too much complexity on the board design. Would you say that
> 32-bit data @ 66 MHz is a reasonable target?

And also provide a way to possibly even lower that speed, to allow for
faster prototyping---not so much for us, but for people deriving their
own design from ours?

And yes, I also want the HWRNG stuff to work fast; waiting weeks to
generate some test data is simply painful.  But so is waiting for custom
PCBs.

> And yes, the way our use cases are there really isn't that big bandwith
> requirements. Neither in writing of at all. But what we do kill us
> pretty fast is latency. If we would use SPI for example we could
> probably get enough bandwidth. But those mux-demux operstions back and
> forth will add hundreds of CPU cycles just to get a 32-bit random data
> word. Not good.

OK, I'll leave that to you again.


Cheers,

    Benedikt

-- 
Benedikt Stockebrand,                   Stepladder IT Training+Consulting
Dipl.-Inform.                           http://www.stepladder-it.com/

          Business Grade IPv6 --- Consulting, Training, Projects

BIVBlog---Benedikt's IT Video Blog: http://www.stepladder-it.com/bivblog/