[Cryptech Tech] reverse engineered bitstream for a FPGA

[Павел Шатов]

On 13.04.2015 18:48, Joachim Strömbergson wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA256
>
> Aloha!
>
> This appeared last night.
>
> Someone has succeeded in reverse engineering the bitstream generated by
> the Lattice iCEcube2 FPGA tool. The device the configuration that has
> been reverse engineered for is a fairly small FPGA, the iCE40
> HX1K-TQ144. But they are now aiming to start build open RTL to bitstream
> tools:

Is this good news or bad news? :)

Non-encrypted bitstreams only provide security through obscurity. Xilinx 
bitstream format was reverse-engineered long time ago 
(http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117.6043&rep=rep1&type=pdf) 
I think Lattice got hacked only recently, because it is not that popular 
and no one was actually interested in it.

--
With best regards,
Pavel Shatov