[Cryptech Tech] BP entropy test system now in the Cryptech repo.

[Joachim Strömbergson]

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Aloha!

I've just added a new sublevel in the cryptech repo called test/ for
experimental implementations. For example investigations into new
entropy sources such as the one by Bernd Paysan.

The test/coretest_bp_entropyrepo contains all RTL files (in src/rtl) for
the toplevel coretest project as well as the entropy and rcon files by
Bernd, slightly adapted to Cryptech.

toolruns/quartus/TerasIC_C5G contains a few setup files for clock and
pins as needed to implement the test system on the TerasIC C5G board
just like core/coretest_hashes. The source file pointers in the qsf-file
are not correct and needs to be updated to point where the source files
mentioned above as well as core/uart and core/coretest are located.

But by basically following the instructions for coretest_hashes (link
below) it should be pretty straight forward to get the BP entropy test
system up and running. Skip the specific parts about the SHA-X hash
functions though.

http://trac.cryptech.is/wiki/CoretestHashesC5G

When building the FPGA config file in Quartus you should _only_ see any
design related warnings about combinational loops. They are the delay
loops Bernd has designed and should be there. Quartus will generate a
design for you.

Post any feedback here and I'll try to help you out.
Good luck.

BTW: I will add src/sw dir with the Python code needed to talk to
coretest in the FPGA and extract data as soon as I have something that
actually does that to some degree. Probably tomorrow afternoon CEST.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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