[Cryptech Tech] I haz hashes!

[Joachim Strömbergson]

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Aloha!

Short status update: We now have a first real subsystem that can be
tested in real FPGA devices. The coretest_hashes has been implemented on
the TerasIC C5G board and both SHA-1 and SHA-256 has successfully
performed first single block processing with known test vectors.

In coretest/hashes/src/sw there is a program hash_tester.py that writes
blocks starts the cores and reads out the digests. The program is really
ugly and lacks support for unit testing. But that will be fixed now that
we have a baseline. And if anyone wants to write a C based test
application that would be great.

I've also checked in a bitstream (sof) file for the TerasIC C5G board to
allow anybody to simply load the bitstream onto the board - if you trust
me to generate the file. ;-) The file is in:

toolruns/quartus/terasic_c5g/cryptech_pre_build_image


Happy hashing!
- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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