[Cryptech Tech] Open JavaCard platform

[Joachim Strömbergson]

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Aloha!

Vicente Sanchez-Leighton wrote:
> I don't know either about any open ARM implementations. On Leon and
> IA32 there's a partially open-source hypervisor called xtratum 
> (http://www.xtratum.org/, http://www.fentiss.com/). On MIPS there
> are open implementations (at least of older architectures), but not
> -yet- open hypervisors.

I don't think we have thought about hypervisors or any other mechanisms
for separation of applications in world/secure domains like TEE/TZ. For
higher level code that might be quite interesting.

Rob considered lightweight RTOSes and this might be worth considering.

> My domain is more hypervisors, TEEs and OSes and not hardware design,
> so bear with me: I would feel some kind of bus mechanism for -at
> least- memory protection or -better- IOMMU would be a must in such
> an architecture as cryptech, to protect functions of different
> security levels from each other. In the ARM architecture there's a
> 33rd lane in the bus to signal to all coprocessors and memory if the
> system is running in normal or secure mode (TrustZone). A full
> fledged IOMMU scheme would be better, but you might feel it is too
> much of a constraint for the cryptech user-designers.

If the control MCU for the lower layer would be running multiple domain
code, something like the TZ separation could be implemented fairly easy
(the famous "how hard can it be?"). At least my naive thinking right now
is that the control MCU in/for the FPGA would run one application only
and all is considered to be secure domain with atomic operations. But
that might not be the case. Your input is interersting.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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