[Cryptech Tech] Novena coretest

[Joachim Strömbergson]

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Aloha!

Forgot something: What is the status - have you been able to actually do
hashing etc in the FPGA with calls from SW running on the CPU?

Yours
JoachimS


Paul Selkirk wrote:
> If you're on the commits mailing list, you may have noticed that I 
> just checked in the I2C version of Joachim's coretest, for the
> Novena.
> 
> There are two new git repos (why does each core have its own repo?): 
> - coretest/core/i2c is the I2C slave - coretest/core/novena is the
> top-level verilog module. It also contains a script to configure the
> FPGA, and a test program (in both C and Python, because you may
> prefer one over the other).
> 
> Joachim (or anyone else with Verilog experience): please check over 
> the Verilog and make sure I haven't done anything really stupid or 
> dangerous.
> 
> Note that I don't do anything with the reset input. The Novena has
> two buttons, labeled "reset" and "user" (and another on the bottom,
> also labeled "user"), but it's not clear if and how they can be
> attached to FPGA input pins.
> 
> I also didn't write any testbench/simulator code for the i2c module, 
> although it looks relatively straightforward.
> 
> To build with the Xilinx command-line tools on Linux, run 'make' in 
> coretest/core/novena/synth. (Why "synth"? That's how it's set up in 
> the novena-ws2312b-fpga project, from which I stole the i2c slave
> code.)
> 
> You can also use the Xilinx ISE Project Navigator to build, but it 
> will require some step-by-step instructions, similar to the 
> CoretestHashesC5G wiki page. (Yes, I should write it up for the
> wiki.)
> 
> paul
> 
> _______________________________________________ Tech mailing list 
> Tech at cryptech.is https://lists.cryptech.is/listinfo/tech


- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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