[Cryptech Tech] Work package suggestion: Cryptech on Novena

[Joachim Strömbergson]

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Aloha!

Randy Bush wrote:
> are transactions synchronous, or queueable.  the latter is very
> complex.

I think that from the start they are synchronous. But having fifos would
probably make for better performance without adding too much complexity.

> does the fpga have access to green ram?  read-only or rw?  i.e. can
> we do a ring buffer of commands packed into tlvs, each possibly
> pointing to data (as one does not want long data to be limited by the
> buffer).

Not sure. Based on info from Cross, the FPGA will be available in EIM
memory. Then it is up to the FPGA-designer to build HW to either allow
the FPGA to read/write from other addresses (memory outside of the FPGA)
or to expose some memory in the FPGA to SW on the CPU.

For my perspective, having memory in the FPGA exposed makes it easier
for SW to do things. How that memory is then used or even implemented in
the FPGA is another matter. It can be a simple FIFO. For example.

I'd say this is one of the things to be investigated in the work package.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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