[Cryptech Core] Increasing AES core performance?

[Rob Austein]

At Fri, 23 Jun 2017 08:18:50 +0200, Joachim Strömbergson wrote:
> 
> What cipher modes are used and supported by Cryptech today? Would we
> need to increase both encipher and decipher operations?

We use AES for keywrap, so it's on the critical path for most
operations involving asymmetric keys.  Speed of unwrapping is probably
more critical than speed of wrapping, because we unwrap every time we
use a key while we only wrap when we modify a key.  But of course
having both be fast would be nice.

That said, I would be surprised if AES speed were anywhere near being
the bottleneck for key operations: the math involved in asymmetric
crypto and the speed of writes to flash almost certainly dominate.

We do not, at present, expose AES directly in any cipher mode.  Adding
the simple ones would not be difficult, just hasn't been critical.

Paul or Pavel would be better people to ask about how much room we
have left on the FPGA.