[Cryptech Core] nit: reset low or high

[Joachim Strömbergson]

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Aloha!

Павел Шатов wrote:
> Yes, different authors have different understanding of reset. This
> may trigger a long dispute of whether you need reset at all, whether
> it should be active-high or active-low, whether it should be sync or
> async, etc. I suggest to just pick a reset strategy and make sure
> that all the code adheres to it, we don't have that much code so far.
> Is it possible to modify Joachim's SHA cores to have active-high
> reset?

We had this discussion before and decided on active low reset. The cores
used to also have asynch reset, but since the cores are primarily for
FPGAs having synch reset is ok.

In this case, Xilinx is doing things a bit differently compared to other
core vendors and tech vendors. As you point out, having no reset is
possible, if we just focus on Xilinx. But for Altera, Actel and for
ASICs that will not work as well.

We can change all other cores, but I'd rather keep the cores active low
and if needed (as in Xilinx) just invert the reset signal before feeding
the CT sub system.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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