[Cryptech Core] FPGA Power Estimation

[Jacob]

 >On Tue Jun 2 06:47:00 UTC 2015 Pavel wrote:
 >>On Mon Jun 1 21:17:26 UTC 2015 Jacob wrote:
 >>  > I've tried to do some early power estimation for the FPGA on the 
Alpha Board.
 >>
 >>  >I think, that more or less reasonable starting point is AC701
 >>  >development board:
 >>
 >>  >VCCINT:  1.0V @ 10A
 >>  >VCCBRAM: 1.0V @ 3A
 >>  >VCCAUX:  1.8V @ 6A
 >>
 >> Pavel, these numbers are the max current that can be produced by the Dev
 >> Board's voltage regulators. These values are much higher that what 
the FPGA actually consumes.
 >>

 >Question is, how much is much. Jacob, could you please give your
 >estimation of current consumption for the aforementioned voltage rails?

 >Pavel

Pavel, Fredrik:

Calculating the power dissipation of a FPGA is a fairly complex 
undertaking and I don't have the design knowledge to do that.

Those values above are absolute maximum of what the regulator chips can 
output.
If one takes the values above as realistic FPGA design values - even for 
a first board cut - please note that they sum up to 24W power 
dissipation (about 3 times more than the Novena board), and require a 
careful consideration of heat sinking and box ventilation. Also, the 
input Power Supply to the Alpha board - 12V * 2.5A= 30W - will be taxed 
to the limit considering other power consumers and switching voltage 
regulators efficiencies on board.

I don't see any other way but to go through the Xilinx power estimation 
tools and try to come up with a reasonable number.

Jacob