[Cryptech Core] FPGA Power Estimation

[Fredrik Thulin]

On Tuesday, June 02, 2015 09:47:00 AM Павел Шатов wrote:
> On 02.06.2015 0:17, Jacob wrote:
> >  > I've tried to do some early power estimation for the FPGA on the Alpha
> >  > Board.
> >  >
> >  >I think, that more or less reasonable starting point is AC701
> >  >development board:
> >  >
> >  >VCCINT:  1.0V @ 10A
> >  >VCCBRAM: 1.0V @ 3A
> >  >VCCAUX:  1.8V @ 6A
> > 
> > Pavel, these numbers are the max current that can be produced by the Dev
> > Board's voltage regulators. These values are much higher that what the
> > FPGA actually consumes.
> 
> Question is, how much is much. Jacob, could you please give your
> estimation of current consumption for the aforementioned voltage rails?

Is there a problem with designing according to your (Pavel's) suggestion, and 
then do some actual measurements when we have things running, to maybe be able 
to scale down the power subsystem for a subsequent design?

To make a car analogy, it seems like we have a car with an engine capable of 
doing 300 km/h, but we're thinking of limiting the fuel supply pipes so that 
the car will in fact only be able to do 120 km/h, since that is the fastest 
speed we can foresee being permitted to drive, in Sweden, for the next couple 
of years?

/Fredrik

PS. It used to be 110 km/h until just a few years ago.