[Cryptech Core] We are trying to get the development going.

[Leif Johansson]

>
> My idea is therefore that we should work somewhat in parallel. We should
> work on the cores and start getting them into real FPGA to test them in
> live FPGAs as soon as possible. My suggestion is to get a cheap FPGA
> board with USB connectivity. This allows us to test a single core (for
> example SHA-256) by sending data/commands from a computer and receive
> resopnse. This board will not allow us to implement a complete HSM
> (unless we define a HSM to be simply a RNG for example).
Sounds reasonable!
>