[Cryptech-Commits] [user/sra/pelican] 52/68: Get inter-page links right

git at cryptech.is git at cryptech.is
Mon Jul 19 22:25:31 UTC 2021
Previous message (by thread): [Cryptech-Commits] [user/sra/pelican] 51/68: Handle bare URLs
Next message (by thread): [Cryptech-Commits] [user/sra/pelican] 53/68: Try mapping source: and browser: links
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
This is an automated email from the git hooks/post-receive script.

sra at hactrn.net pushed a commit to branch pelican
in repository user/sra/pelican.

commit a255b67f6d487703db648c58ee1e50c0aa85c2a6
Author: Rob Austein <sra at hactrn.net>
AuthorDate: Mon Feb 15 23:28:19 2021 +0000

    Get inter-page links right
---
 pelican/content/ASICImplementations.md         |  2 +-
 pelican/content/AlphaBoardComponents.md        |  2 +-
 pelican/content/AlphaBoardStrategy.md          |  6 +++---
 pelican/content/AlphaSchematics.md             |  2 +-
 pelican/content/BerlinWorkshop.md              |  2 +-
 pelican/content/CoretestHashesNovena.md        |  2 +-
 pelican/content/DNSSEC.md                      |  2 +-
 pelican/content/DevBridgeBoard.md              |  4 ++--
 pelican/content/DevelopersGuide.md             |  8 ++++----
 pelican/content/DisasterRecovery.md            |  4 ++--
 pelican/content/DocMeet.md                     |  2 +-
 pelican/content/Documents.md                   |  6 +++---
 pelican/content/ExternalProjects.md            |  2 +-
 pelican/content/ExternalProjectsTorHSM.md      |  2 +-
 pelican/content/Hardware.md                    |  4 ++--
 pelican/content/InterconnectStandards.md       |  2 +-
 pelican/content/Joachim%20Str%C3%B6mbergson.md | 10 +++++-----
 pelican/content/OpenCryptoChip.md              | 16 ++++++++--------
 pelican/content/OpenDNSSEC.md                  |  4 ++--
 pelican/content/ProjectArchive.md              |  2 +-
 pelican/content/ProjectMetadata.md             | 18 +++++++++---------
 pelican/content/ProjectStatus.md               | 14 +++++++-------
 pelican/content/QuickStart.md                  | 14 +++++++-------
 pelican/content/ReleaseNotes.md                |  4 ++--
 pelican/content/SideChannel.md                 |  2 +-
 pelican/content/StateOfPlay.md                 |  2 +-
 pelican/content/UpgradeToKSNG.md               |  6 +++---
 pelican/content/Upgrading.md                   |  2 +-
 pelican/content/WikiStart.md                   | 12 ++++++------
 trac2md.py                                     |  4 ++--
 30 files changed, 81 insertions(+), 81 deletions(-)

diff --git a/pelican/content/ASICImplementations.md b/pelican/content/ASICImplementations.md
index 4990471..f3ce441 100644
--- a/pelican/content/ASICImplementations.md
+++ b/pelican/content/ASICImplementations.md
@@ -23,7 +23,7 @@ features from IEEE 1364-2001 (aka Verilog 2001).
 
 All RTL code is divided into modules that contain one process for register updates and reset (*reg_update*), one or more combinational processes for datapath and support logic such as counters. Finally if needed, each module has a separate process that implements the logic for the final state machine that controls the behaviour of the module.
 
-All cores are divided into a core, for example *sha256_core.v* and a number of submodules the core instantiates. The core provides raw, wide ports (256 bit wide key for AES for example) that is not suitable to use in a stand alone system. Instead each core comes with a top level wrapper, for example *sha256.v*. This top level wrapper contains all registers and logic needed to provide all functionality of the core via a simple 32-bit memory like interface. If the core is going to be used  [...]
+All cores are divided into a core, for example *sha256_core.v* and a number of submodules the core instantiates. The core provides raw, wide ports (256 bit wide key for AES for example) that is not suitable to use in a stand alone system. Instead each core comes with a top level wrapper, for example *sha256.v*. This top level wrapper contains all registers and logic needed to provide all functionality of the core via a simple 32-bit memory like interface. If the core is going to be used  [...]
 
 The RTL code does not explicitly instantiate any hard macros such as
 memories, multipliers, etc.  Instead all such functions are left to the
diff --git a/pelican/content/AlphaBoardComponents.md b/pelican/content/AlphaBoardComponents.md
index 09fd9ec..9cd79f6 100644
--- a/pelican/content/AlphaBoardComponents.md
+++ b/pelican/content/AlphaBoardComponents.md
@@ -7,7 +7,7 @@ This document contains a list of component level description and requirements fo
 
 The document is to be used as a BOM (Bill Of Materials) and PCB design requirement description for discussing with PCB designers on what we want to have designed.  
 
-The block diagram for the Alpha board can be seen at: [Hardware](Hardware.md)
+The block diagram for the Alpha board can be seen at: [Hardware]({filename}Hardware.md)
 
 The Alpha board basically consists of three major sub systems:  
 
diff --git a/pelican/content/AlphaBoardStrategy.md b/pelican/content/AlphaBoardStrategy.md
index fc20bd8..6fc5fa5 100644
--- a/pelican/content/AlphaBoardStrategy.md
+++ b/pelican/content/AlphaBoardStrategy.md
@@ -9,8 +9,8 @@ Develop a first, custom HSM board that can be used to support a first set of app
 
 
 * The use cases and requirements for the alpha board are specified on the [Dashboard](http://trac.cryptech.is/wiki/Dashboard).
-* The basic blocks of the Alpha board is [shown here](Hardware.md).
-* The [BOM and component requirements](AlphaBoardComponents.md).
+* The basic blocks of the Alpha board is [shown here]({filename}Hardware.md).
+* The [BOM and component requirements]({filename}AlphaBoardComponents.md).
 * The detailed [Alpha board functional drawing](http://trac.cryptech.is/browser/doc/design/Alpha_board_drawing.pdf).
 
 
@@ -18,7 +18,7 @@ Develop a first, custom HSM board that can be used to support a first set of app
 ## Plan
 1. Choose FPGA and ARM (done)
 2. Develop BOM, requirements and functional diagram (done-ish).
-3. Develop complete [schematics](AlphaSchematics.md) (almost done).
+3. Develop complete [schematics]({filename}AlphaSchematics.md) (almost done).
 4. Develop dev-board ouorselves to connect chosen ARM to FPGA on Novena, to do some early development and testing in parallell with step 5.
 5. Get professional designer to do many-layer PCB from schematics.
 6. Manufacture a couple of boards (~10).
diff --git a/pelican/content/AlphaSchematics.md b/pelican/content/AlphaSchematics.md
index e08942a..ae59fdc 100644
--- a/pelican/content/AlphaSchematics.md
+++ b/pelican/content/AlphaSchematics.md
@@ -10,4 +10,4 @@ PDF and Eagle files available for download here in the [hardware](source:/hardwa
 
 The schematics are based on the dev-bridge board that we made in the summer of 2015, which is why it is called rev02.
 
-We are currently seeking review of the schematics to finalize them before starting layout. A log of various peoples review comments is kept [here](AlphaReviewLog.md).
+We are currently seeking review of the schematics to finalize them before starting layout. A log of various peoples review comments is kept [here]({filename}AlphaReviewLog.md).
diff --git a/pelican/content/BerlinWorkshop.md b/pelican/content/BerlinWorkshop.md
index 18692ec..09227a2 100644
--- a/pelican/content/BerlinWorkshop.md
+++ b/pelican/content/BerlinWorkshop.md
@@ -29,7 +29,7 @@ Alpha Board cost: if you are an alpha tester and plan to take an alpha board hom
 |      | - PKCS11, client-side software, how to configure the board (attachment:2016-07-15-berlin-fw.pdf)
 | 1100 | Break
 | 1130 | Hands-on testing
-|      | - get binary packages running on participants' own laptops ([BinaryPackages](BinaryPackages.md))
+|      | - get binary packages running on participants' own laptops ([BinaryPackages]({filename}BinaryPackages.md))
 |      | - [OpenDNSSEC](OpenDNSSEC) is a guide for how to initialize a rev03 board and use it to sign a zone using OpenDNNSSEC - use as a baseline for own testing and experimentation with PKCS11-based applications.
 | 1230 | Buffet lunch
 | 1330 | Hands-on testing continues
diff --git a/pelican/content/CoretestHashesNovena.md b/pelican/content/CoretestHashesNovena.md
index fc3bc80..43e9838 100644
--- a/pelican/content/CoretestHashesNovena.md
+++ b/pelican/content/CoretestHashesNovena.md
@@ -217,7 +217,7 @@ The expected build time should be something like 5 and 10 minutes, depending on
 Some measured build times for the design:
 
 
-    - 5,30 minutes on [MacbookPro](MacbookPro.md) 2013 with tools in 64-bit SUSE Linux in VM
+    - 5,30 minutes on [MacbookPro]({filename}MacbookPro.md) 2013 with tools in 64-bit SUSE Linux in VM
     - 9,20 minutes on AMD A10-6800K with tools in Windows 7 in Virtualbox VM with one CPU core and 4 GByte RAM.
 
 
diff --git a/pelican/content/DNSSEC.md b/pelican/content/DNSSEC.md
index 471b378..419a419 100644
--- a/pelican/content/DNSSEC.md
+++ b/pelican/content/DNSSEC.md
@@ -5,4 +5,4 @@ Date: 2016-12-15 22:43
 # DNSSEC
 
 
-- [DNSSEC Requirements](DNSSEC/Requirements.md)
+- [DNSSEC Requirements]({filename}DNSSEC/Requirements.md)
diff --git a/pelican/content/DevBridgeBoard.md b/pelican/content/DevBridgeBoard.md
index a3e753e..38c8641 100644
--- a/pelican/content/DevBridgeBoard.md
+++ b/pelican/content/DevBridgeBoard.md
@@ -6,7 +6,7 @@ Modified: 2021-02-14 17:30
 
 
 # dev-bridge board
-In the process of developing the [AlphaBoardComponents](AlphaBoardComponents.md) design, the project has made what is known as the "dev-bridge board".
+In the process of developing the [AlphaBoardComponents]({filename}AlphaBoardComponents.md) design, the project has made what is known as the "dev-bridge board".
 
 This is a board, 100x70 mm, with about 2/3 of the components intended to be on the Alpha design. What is missing is basically the FPGA and it's supporting circuits.
 
@@ -42,4 +42,4 @@ you want to avoid scraping them with the bolt head or the nut. I happen to
 be using a countersink-head bolt, which is beveled toward the shaft, but
 it's probably even better to use a nylon washer.
 
-All the software, as well as flashing instructions, are at [GitRepositories/sw/stm32](GitRepositories/sw/stm32.md).
+All the software, as well as flashing instructions, are at [GitRepositories/sw/stm32]({filename}GitRepositories/sw/stm32.md).
diff --git a/pelican/content/DevelopersGuide.md b/pelican/content/DevelopersGuide.md
index 5a9844d..79e718e 100644
--- a/pelican/content/DevelopersGuide.md
+++ b/pelican/content/DevelopersGuide.md
@@ -8,14 +8,14 @@ Date: 2016-12-15 22:39
 
 ## Architecture
 
-* [OpenCryptoChip](OpenCryptoChip.md)
-* [NoisyDiode](NoisyDiode.md)
-* [AlphaBoard](AlphaBoard.md)
+* [OpenCryptoChip]({filename}OpenCryptoChip.md)
+* [NoisyDiode]({filename}NoisyDiode.md)
+* [AlphaBoard]({filename}AlphaBoard.md)
 
 
 ## Known Limitations
 
-* [AssuredTooChain](AssuredTooChain.md)
+* [AssuredTooChain]({filename}AssuredTooChain.md)
 
 
 
diff --git a/pelican/content/DisasterRecovery.md b/pelican/content/DisasterRecovery.md
index 2fae666..18b325d 100644
--- a/pelican/content/DisasterRecovery.md
+++ b/pelican/content/DisasterRecovery.md
@@ -22,7 +22,7 @@ PIN: <your-wheel-pin>
 ### Recovering from a bad bootloader install
 
 Well, now you've done it. You'll need to buy an ST-LINK programmer.
-See [UsingSTLink](UsingSTLink.md).
+See [UsingSTLink]({filename}UsingSTLink.md).
 
 ## Oh no, I'm locked out of my device
 
@@ -33,7 +33,7 @@ best case scenario. Log in as wheel with the default PIN
 able to reset the PINs.
 
 If you forgot the PIN, I feel sorry for you. The only way out of this is
-via [ST-LINK](UsingSTLink.md). The easiest way is to debug with `gdb`, set a breakpoint on
+via [ST-LINK]({filename}UsingSTLink.md). The easiest way is to debug with `gdb`, set a breakpoint on
 `hal_rpc_login`, and issue the gdb command `return 0`.
 
 ## Oh no, I forgot (or reset) the master key
diff --git a/pelican/content/DocMeet.md b/pelican/content/DocMeet.md
index f7e31c4..224998a 100644
--- a/pelican/content/DocMeet.md
+++ b/pelican/content/DocMeet.md
@@ -13,4 +13,4 @@ Date: 2016-12-15 22:39
 ## Documents
 
 * [140109.cryptech.pdf Presentation - Overview of Project with Funding Requests]({attach}DocMeet/140109.cryptech.pdf)
-* [attachment:141002.cryptech-iij.pdf 141002.cryptech-iij.pdf [CrypTech](CrypTech.md) Presentation at Open IIJ Seminar]
+* [attachment:141002.cryptech-iij.pdf 141002.cryptech-iij.pdf [CrypTech]({filename}CrypTech.md) Presentation at Open IIJ Seminar]
diff --git a/pelican/content/Documents.md b/pelican/content/Documents.md
index f5fe104..94ded39 100644
--- a/pelican/content/Documents.md
+++ b/pelican/content/Documents.md
@@ -13,14 +13,14 @@ Remember that links from this page to files in git repositories should use the "
 
 ```
 
-[Randomness Testing Tools](RandomnessTesting.md)  
+[Randomness Testing Tools]({filename}RandomnessTesting.md)  
 
 
-[Alpha board strategy](AlphaBoardStrategy.md)
+[Alpha board strategy]({filename}AlphaBoardStrategy.md)
 
 [Alpha board drawing](export:/doc/design/Alpha_board_drawing.pdf)
 
-[Alpha board pictures](AlphaBoardPictures.md)
+[Alpha board pictures]({filename}AlphaBoardPictures.md)
 
 Placeholder until somebody fills this in with something else interesting.
 
diff --git a/pelican/content/ExternalProjects.md b/pelican/content/ExternalProjects.md
index 4c353ba..8a86b9b 100644
--- a/pelican/content/ExternalProjects.md
+++ b/pelican/content/ExternalProjects.md
@@ -6,4 +6,4 @@ Modified: 2018-09-17 10:27
 External projects using [CrypTech](https://cryptech.is/) technology.
 
 
-* [TorHSM](ExternalProjectsTorHSM.md)
+* [TorHSM]({filename}ExternalProjectsTorHSM.md)
diff --git a/pelican/content/ExternalProjectsTorHSM.md b/pelican/content/ExternalProjectsTorHSM.md
index e9c9da5..40ff4ee 100644
--- a/pelican/content/ExternalProjectsTorHSM.md
+++ b/pelican/content/ExternalProjectsTorHSM.md
@@ -90,6 +90,6 @@ The system at MS6 (to MS8) does not make any part of the process worse from a //
 
 
 * [Tor directory protocol, version 3](https://gitweb.torproject.org/torspec.git/tree/dir-spec.txt)
-* [https://www.crowdsupply.com/cryptech/open-hardware-security-module [CrypTech](CrypTech.md) Alpha system]
+* [https://www.crowdsupply.com/cryptech/open-hardware-security-module [CrypTech]({filename}CrypTech.md) Alpha system]
 
 
diff --git a/pelican/content/Hardware.md b/pelican/content/Hardware.md
index 17bf827..d27fdb0 100644
--- a/pelican/content/Hardware.md
+++ b/pelican/content/Hardware.md
@@ -10,7 +10,7 @@ Various generic FPGA development boards.
 
 ## Generation 2
 
-//[Novena](CoretestHashesNovena.md)//
+//[Novena]({filename}CoretestHashesNovena.md)//
 
 ## Generation 3
 
@@ -29,4 +29,4 @@ For the ARM, we think we want
     * All components must be free of any GPL-like virus or restrictions
 
 
-[The BOM and board requirements for the alpha board](AlphaBoardComponents.md).
+[The BOM and board requirements for the alpha board]({filename}AlphaBoardComponents.md).
diff --git a/pelican/content/InterconnectStandards.md b/pelican/content/InterconnectStandards.md
index 11a547c..de0e81c 100644
--- a/pelican/content/InterconnectStandards.md
+++ b/pelican/content/InterconnectStandards.md
@@ -133,7 +133,7 @@ sell products that use, or are based on Avalon interfaces."
 
 As far as we can discern, Avalon is not generally used outside of Altera
 based designs and not supported by a large group of third party
-vendors. The [OpenCores](OpenCores.md) project lists only a few cores that uses Avalon
+vendors. The [OpenCores]({filename}OpenCores.md) project lists only a few cores that uses Avalon
 as interface standard.
 
 =
diff --git a/pelican/content/Joachim%20Str%C3%B6mbergson.md b/pelican/content/Joachim%20Str%C3%B6mbergson.md
index f8490fc..eed092e 100644
--- a/pelican/content/Joachim%20Str%C3%B6mbergson.md
+++ b/pelican/content/Joachim%20Str%C3%B6mbergson.md
@@ -35,9 +35,9 @@ Date: 2016-12-15 22:54
 We need to create an accelerator or possibly a complete implementation of the Curve25519 EC based DH-excgange.  We should be able to look at some previous work:
 
 
-* http://eprint.iacr.org/2013/375 - [NaCl](NaCl.md) on 8-Bit AVR Microcontrollers. Includes an iterative implementation of Curve25519
+* http://eprint.iacr.org/2013/375 - [NaCl]({filename}NaCl.md) on 8-Bit AVR Microcontrollers. Includes an iterative implementation of Curve25519
 * http://cryptojedi.org/crypto/index.shtml - The code to the implementation
-* http://nacl.cr.yp.to/ - The main [NaCl](NaCl.md) library by DJB.
+* http://nacl.cr.yp.to/ - The main [NaCl]({filename}NaCl.md) library by DJB.
 * http://cr.yp.to/ecdh/curve25519-20060209.pdf - The Curve25519 paper by DJB.
 
 
@@ -197,7 +197,7 @@ Technology
 - Toolchains and languages
     - SW
     - HW
-        - Verilog 2001, 2005, [SystemVerilog](SystemVerilog.md)
+        - Verilog 2001, 2005, [SystemVerilog]({filename}SystemVerilog.md)
         - Icarus, gplcver
         - Vendor specific
         - Validation of bitstream
@@ -223,7 +223,7 @@ Technology
 
 
 - Reuse of existing design, code?
-    - Cores - [OpenCores](OpenCores.md)
+    - Cores - [OpenCores]({filename}OpenCores.md)
         - OpenRISC
         - AES, SHA, RSA
     - SoftHSM - DNSSEC PKCS#11
@@ -331,7 +331,7 @@ Documentation
 -------------
 
 - Meetings
-    - Discussions, [MoMs](MoMs.md)
+    - Discussions, [MoMs]({filename}MoMs.md)
     - Decisiona - motivation
 
 
diff --git a/pelican/content/OpenCryptoChip.md b/pelican/content/OpenCryptoChip.md
index 6f1fa97..b08e9ab 100644
--- a/pelican/content/OpenCryptoChip.md
+++ b/pelican/content/OpenCryptoChip.md
@@ -69,7 +69,7 @@ We need to support key wrapping. Some pointers:
 
 
 # Rough Cut at v0.01 Proof of Concept Feature Set
-As a proof of concept, to validate as much as possible the assurance of the tools and methods, and as a demonstration of the project tools, team, and architecture, we have a [proposed version 0.01 product](RoughV1.md) as a proof of concept and a demonstration of the project tools, team, and architecture
+As a proof of concept, to validate as much as possible the assurance of the tools and methods, and as a demonstration of the project tools, team, and architecture, we have a [proposed version 0.01 product]({filename}RoughV1.md) as a proof of concept and a demonstration of the project tools, team, and architecture
   
 
   
@@ -92,10 +92,10 @@ As a proof of concept, to validate as much as possible the assurance of the tool
 
 # Ongoing Development
 
-* [SUNET is sponsoring the first two development steps](SunetInitialDevelopment.md) currently being done.
-* [ Investigation and planning of a TRNG with entropy sources](TRNGDevelopment.md)
-* [Investigation of possible EDA tools and ways to do open and assured HW development"](EDAToolchainSurvey".md)
-* [Collection about side-channel attacks and detection, mitigation methods"](SideChannel".md)
+* [SUNET is sponsoring the first two development steps]({filename}SunetInitialDevelopment.md) currently being done.
+* [ Investigation and planning of a TRNG with entropy sources]({filename}TRNGDevelopment.md)
+* [Investigation of possible EDA tools and ways to do open and assured HW development"]({filename}EDAToolchainSurvey".md)
+* [Collection about side-channel attacks and detection, mitigation methods"]({filename}SideChannel".md)
 
 
 # v0.1 Major Sub-Projects
@@ -115,7 +115,7 @@ As a proof of concept, to validate as much as possible the assurance of the tool
 * TerasIC C5G Cyclone 5 GX Starter Kit. Includes an Altera C5GX FPGA. This board is used for core, subsystem development and verification. Info, documentation and ordering of the TerasIC board can be found here: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=830
 
 
-Here is a writeup on how to [setup and run coretest_hashes on the C5G board](CoretestHashesC5G.md).
+Here is a writeup on how to [setup and run coretest_hashes on the C5G board]({filename}CoretestHashesC5G.md).
 
 
 * TerasIC DE0-Nano board. This tiny, USB powered board is used for core development and verification. Info, documentation, resources, ordering of the TerasIC board can be found here: http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593
@@ -129,7 +129,7 @@ Here is a writeup on how to [setup and run coretest_hashes on the C5G board](Cor
 
 * Research
 * Select
-* [On-chip Interconnect Standards](InterconnectStandards.md) to use.
+* [On-chip Interconnect Standards]({filename}InterconnectStandards.md) to use.
 
 
 ## Methods and Validation
@@ -191,4 +191,4 @@ Here is a writeup on how to [setup and run coretest_hashes on the C5G board](Cor
 
 
 # Future Development
-The v0.1 version of [CrypTech](CrypTech.md) is not the last version nor the only possible version. The project for example consider possible [ASIC Implementations](ASICImplementations.md).
+The v0.1 version of [CrypTech]({filename}CrypTech.md) is not the last version nor the only possible version. The project for example consider possible [ASIC Implementations]({filename}ASICImplementations.md).
diff --git a/pelican/content/OpenDNSSEC.md b/pelican/content/OpenDNSSEC.md
index 8ddb230..3d1996f 100644
--- a/pelican/content/OpenDNSSEC.md
+++ b/pelican/content/OpenDNSSEC.md
@@ -11,13 +11,13 @@ Modified: 2017-05-13 21:34
 - A Cryptech Alpha board, preferrably revision "rev03"
 - APT on the host system configured to find packages in the Cryptech
 
-  repository, see [BinaryPackages](BinaryPackages.md) for instructions
+  repository, see [BinaryPackages]({filename}BinaryPackages.md) for instructions
 
 ```
 apt-get install cryptech-alpha opendnssec opensc
 ```
 
-Once you have the software package installed, you may need to [upgrade your HSM's firmware](Upgrading.md).
+Once you have the software package installed, you may need to [upgrade your HSM's firmware]({filename}Upgrading.md).
 
 ## Configure the HSM
 
diff --git a/pelican/content/ProjectArchive.md b/pelican/content/ProjectArchive.md
index 596457f..b19a926 100644
--- a/pelican/content/ProjectArchive.md
+++ b/pelican/content/ProjectArchive.md
@@ -5,4 +5,4 @@ Date: 2016-12-15 22:44
 *Page Under Construction*
 
 # Project Archive and Far Future Planning
-## [Assured Tool Chain](AssuredTooChain.md)
+## [Assured Tool Chain]({filename}AssuredTooChain.md)
diff --git a/pelican/content/ProjectMetadata.md b/pelican/content/ProjectMetadata.md
index ddb53da..a8d7709 100644
--- a/pelican/content/ProjectMetadata.md
+++ b/pelican/content/ProjectMetadata.md
@@ -8,24 +8,24 @@ Date: 2016-12-15 22:43
 ## Project Logo Files
 
 * See "Attachments" at the bottom of this page
-* [PhotoFolder](PhotoFolder.md)
+* [PhotoFolder]({filename}PhotoFolder.md)
 
 
 == Meeting Presentations and Notes ==
 
-* [DocMeet](DocMeet.md)
-* [PrahaWorkshop](PrahaWorkshop.md)
-* [BerlinWorkshop](BerlinWorkshop.md)
+* [DocMeet]({filename}DocMeet.md)
+* [PrahaWorkshop]({filename}PrahaWorkshop.md)
+* [BerlinWorkshop]({filename}BerlinWorkshop.md)
 
 
 == Technical References	==
 
-* [MiscStuff](MiscStuff.md)
-* [InterconnectStandards](InterconnectStandards.md)
-* [RandomnessTesting](RandomnessTesting.md)
+* [MiscStuff]({filename}MiscStuff.md)
+* [InterconnectStandards]({filename}InterconnectStandards.md)
+* [RandomnessTesting]({filename}RandomnessTesting.md)
 
 
 == Related Work ==
 
-* [RelatedWork](RelatedWork.md)
-* [SideChannel](SideChannel.md)
+* [RelatedWork]({filename}RelatedWork.md)
+* [SideChannel]({filename}SideChannel.md)
diff --git a/pelican/content/ProjectStatus.md b/pelican/content/ProjectStatus.md
index 7da6977..a07c1c6 100644
--- a/pelican/content/ProjectStatus.md
+++ b/pelican/content/ProjectStatus.md
@@ -6,18 +6,18 @@ Date: 2016-12-15 22:44
 
 # Project Status
 
-## [Project Dashboard](Dashboard.md)
+## [Project Dashboard]({filename}Dashboard.md)
 
 ## Crypto Chip Design and Prototype
 
-* [PostAlphaPlan](PostAlphaPlan.md)
-* [AlphaBoardStrategy](AlphaBoardStrategy.md)
-* [AlphaBoardComponents](AlphaBoardComponents.md)
+* [PostAlphaPlan]({filename}PostAlphaPlan.md)
+* [AlphaBoardStrategy]({filename}AlphaBoardStrategy.md)
+* [AlphaBoardComponents]({filename}AlphaBoardComponents.md)
 * [Core Git Repository](http://trac.cryptech.is/wiki/GitRepositories/core)
-* [Hardware](Hardware.md)
-* [DevBridgeBoard](DevBridgeBoard.md)
+* [Hardware]({filename}Hardware.md)
+* [DevBridgeBoard]({filename}DevBridgeBoard.md)
 
 
 ## Pilot Project
 
-* [Requirements](DNSSEC.md)
+* [Requirements]({filename}DNSSEC.md)
diff --git a/pelican/content/QuickStart.md b/pelican/content/QuickStart.md
index a6f68bc..84f147d 100644
--- a/pelican/content/QuickStart.md
+++ b/pelican/content/QuickStart.md
@@ -16,15 +16,15 @@ The active repositories are automatically posted to GitRepositories.
 
 The current hardware is the AlphaBoard.  More information (to be organized at some point -- yes, this wiki is a mess, again):
 
-* [AlphaBoardComponents](AlphaBoardComponents.md)
-* [AlphaBoardPictures](AlphaBoardPictures.md)
-* [AlphaBoardReview](AlphaBoardReview.md)
-* [AlphaBoardStrategy](AlphaBoardStrategy.md)
-* [AlphaReviewLog](AlphaReviewLog.md)
-* [AlphaSchematics](AlphaSchematics.md)
+* [AlphaBoardComponents]({filename}AlphaBoardComponents.md)
+* [AlphaBoardPictures]({filename}AlphaBoardPictures.md)
+* [AlphaBoardReview]({filename}AlphaBoardReview.md)
+* [AlphaBoardStrategy]({filename}AlphaBoardStrategy.md)
+* [AlphaReviewLog]({filename}AlphaReviewLog.md)
+* [AlphaSchematics]({filename}AlphaSchematics.md)
 
 
-The Alpha board currently ships with very old firmware, but you can [upgrade it yourself](Upgrading.md).
+The Alpha board currently ships with very old firmware, but you can [upgrade it yourself]({filename}Upgrading.md).
 
 # DNSSEC signing using OpenDNSSEC
 
diff --git a/pelican/content/ReleaseNotes.md b/pelican/content/ReleaseNotes.md
index 52eedbb..8282557 100644
--- a/pelican/content/ReleaseNotes.md
+++ b/pelican/content/ReleaseNotes.md
@@ -28,8 +28,8 @@ Modified: 2017-05-13 19:18
 Getting started with 3.0:
 
 
-* [Install the software](BinaryPackages.md).
-* [Upgrade the firmware](Upgrading.md).  **Please note the warnings about bricking your HSM**, how to avoid that, and what to do if you failed to avoid it.
+* [Install the software]({filename}BinaryPackages.md).
+* [Upgrade the firmware]({filename}Upgrading.md).  **Please note the warnings about bricking your HSM**, how to avoid that, and what to do if you failed to avoid it.
 * Set the usual environment variables, perhaps using `cryptech_probe`.
 * Start the multiplexer daemon `cryptech_muxd`.
 
diff --git a/pelican/content/SideChannel.md b/pelican/content/SideChannel.md
index d22702a..3f170c4 100644
--- a/pelican/content/SideChannel.md
+++ b/pelican/content/SideChannel.md
@@ -5,7 +5,7 @@ Date: 2016-12-15 22:44
 
 # Side Channel Attacks
 
-Side Channel attacks on hardware are hard to avoid, detect and mitigate. But this should not stop us from trying. The [CrypTech](CrypTech.md) platform should be developed with side channel issues in mind. This page tries to collect information about relevant side channel attacks, mitigation strategies, side channel resistant design methods (blinding for example) and detection.
+Side Channel attacks on hardware are hard to avoid, detect and mitigate. But this should not stop us from trying. The [CrypTech]({filename}CrypTech.md) platform should be developed with side channel issues in mind. This page tries to collect information about relevant side channel attacks, mitigation strategies, side channel resistant design methods (blinding for example) and detection.
 
 
 * http://eprint.iacr.org/2013/579 "On Measurable Side-Channel Leaks inside ASIC Design Primitives"
diff --git a/pelican/content/StateOfPlay.md b/pelican/content/StateOfPlay.md
index c5ac919..cf0aa01 100644
--- a/pelican/content/StateOfPlay.md
+++ b/pelican/content/StateOfPlay.md
@@ -53,7 +53,7 @@ fits together.
 
 At this point I have figured out how to build two different FPGA
 images for the Novena PVT1.  In both cases, I'm using the Makefile
-rather than attempting to use the [XiLinx](XiLinx.md) GUI environment.
+rather than attempting to use the [XiLinx]({filename}XiLinx.md) GUI environment.
 
 
 * `core/novena` builds the current set of digest cores into a
diff --git a/pelican/content/UpgradeToKSNG.md b/pelican/content/UpgradeToKSNG.md
index 59a3f34..cd6e1fc 100644
--- a/pelican/content/UpgradeToKSNG.md
+++ b/pelican/content/UpgradeToKSNG.md
@@ -84,7 +84,7 @@ just replace the old package with the new one.  Homebrew, on the other
 hand, reports the conflict and refuses to proceed until you sort it out.
 
 The following assumes that you already had the Cryptech APT repository
-or Homebrew tap configured; if not, see  [BinaryPackages](BinaryPackages.md).
+or Homebrew tap configured; if not, see  [BinaryPackages]({filename}BinaryPackages.md).
 
 ### Installing cryptech-alpha-ksng package using apt-get on Debian or Ubuntu Linux
 
@@ -162,7 +162,7 @@ cryptech> masterkey set
 
 If the above procedure somehow goes horribly wrong and bricks your
 alpha, you can still recover, but you'll need an ST-LINK programmer.
-There's some discussion of this at [GitRepositories/sw/stm32](GitRepositories/sw/stm32.md).
+There's some discussion of this at [GitRepositories/sw/stm32]({filename}GitRepositories/sw/stm32.md).
 
 Possible sources for the ST-LINK programmer and a suitable cable:
 
@@ -177,7 +177,7 @@ for it.
 
 The programmer is the important part, you can use any sort of cabling
 you like so long as it connects the right pins of the programmer to
-the corresponding pins on the Alpha; the [SparkFun](SparkFun.md) cable just happens
+the corresponding pins on the Alpha; the [SparkFun]({filename}SparkFun.md) cable just happens
 to be a tidy package which matches the relevant SWD headers.
 
 We'll include a more detailed description of the recovery process here
diff --git a/pelican/content/Upgrading.md b/pelican/content/Upgrading.md
index 517ffb6..ffeb2ef 100644
--- a/pelican/content/Upgrading.md
+++ b/pelican/content/Upgrading.md
@@ -50,7 +50,7 @@ your Alpha, see DisasterRecovery.
 ## Upgrading from 'ksng'
 
 A few intrepid users are already testing the 'ksng' development branch,
-using the instructions at [UpgradeToKSNG](UpgradeToKSNG.md). In this case, and with future
+using the instructions at [UpgradeToKSNG]({filename}UpgradeToKSNG.md). In this case, and with future
 upgrades, it it not necessary to either wipe the keystore or upgrade the
 bootloader.
 
diff --git a/pelican/content/WikiStart.md b/pelican/content/WikiStart.md
index 325bd79..872a16f 100644
--- a/pelican/content/WikiStart.md
+++ b/pelican/content/WikiStart.md
@@ -30,7 +30,7 @@ kind.
 
 # About Us
 [CrypTech.IS](https://cryptech.is) is a loose international collective
-of [engineers](WhoWeAre.md) trying to improve assurance and privacy on the
+of [engineers]({filename}WhoWeAre.md) trying to improve assurance and privacy on the
 Internet. It is funded diversely and is administratively quartered outside
 the US.
 
@@ -55,26 +55,26 @@ offering [financial support](https://cryptech.is/funding/) to keep the
 work flowing.
 
 # More Information
-## [Quick Start Guide](QuickStart.md)
+## [Quick Start Guide]({filename}QuickStart.md)
 
 * including pointers to the git repositories, information on how to set up and configure the board and software, and HSM requirements
 
 
-## [Developers Guide](DevelopersGuide.md)
+## [Developers Guide]({filename}DevelopersGuide.md)
 
 * including the architecture diagrams, and known information
 
 
-## [Project Status](ProjectStatus.md)
+## [Project Status]({filename}ProjectStatus.md)
 
 * including information on the chip design and prototypes as well as the pilot project(s)
 
 
-## [Project Metadata](ProjectMetadata.md)
+## [Project Metadata]({filename}ProjectMetadata.md)
 
 * including information on presentations and meeting notes, technical references, and related work
 
 
-## [Project Archive](ProjectArchive.md)
+## [Project Archive]({filename}ProjectArchive.md)
 
 * including information on dormant and far-future work
diff --git a/trac2md.py b/trac2md.py
index 55ca251..ab8a558 100755
--- a/trac2md.py
+++ b/trac2md.py
@@ -57,7 +57,7 @@ def convert_traclink_to_creolelink(line):
         text = m.group(1).strip()
         if " " in text:
             line = line.replace(m.group(0), "[[{0[0]}|{0[1]}]]".format(text.split(" ", 1)))
-        elif any(text.startswith(scheme) for scheme in ("http:", "https:", "wiki:", "attachment:")) or camelcase_pattern.match(text):
+        elif ":" in text or camelcase_pattern.match(text):
             line = line.replace(m.group(0), "[[{}]]".format(text))
     return line
 
@@ -76,7 +76,7 @@ def convert_wikilinks(line, slug):
         elif scheme == "attachment:":
             mdlink = "[{}]({{attach}}{}/{})".format(text, slug, link)
         elif scheme == "wiki:" or (scheme is None and camelcase_pattern.match(link)):
-            mdlink = "[{}]({}.md)".format(text, link)
+            mdlink = "[{}]({{filename}}{}.md)".format(text, link)
         else:
             mdlink = "[{}]({})".format(text, link)
         line = line.replace(m.group(0), mdlink)
Previous message (by thread): [Cryptech-Commits] [user/sra/pelican] 51/68: Handle bare URLs
Next message (by thread): [Cryptech-Commits] [user/sra/pelican] 53/68: Try mapping source: and browser: links
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
More information about the Commits mailing list