[Cryptech-Commits] [user/sra/pelican] 51/68: Handle bare URLs

git at cryptech.is git at cryptech.is
Mon Jul 19 22:25:30 UTC 2021


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sra at hactrn.net pushed a commit to branch pelican
in repository user/sra/pelican.

commit 7acac1b6d1d8fbbe4b3c407be891f8bf65120c93
Author: Rob Austein <sra at hactrn.net>
AuthorDate: Mon Feb 15 22:30:14 2021 +0000

    Handle bare URLs
---
 pelican/content/AlphaBoardComponents.md | 10 +++++-----
 pelican/content/CoretestHashesNovena.md |  2 +-
 pelican/content/Dashboard.md            |  2 +-
 pelican/content/GettingStartedNovena.md |  2 +-
 pelican/content/MiscStuff.md            |  8 ++++----
 pelican/content/TRNGDevelopment.md      |  2 +-
 trac2md.py                              | 15 ++++-----------
 7 files changed, 17 insertions(+), 24 deletions(-)

diff --git a/pelican/content/AlphaBoardComponents.md b/pelican/content/AlphaBoardComponents.md
index f23477a..09fd9ec 100644
--- a/pelican/content/AlphaBoardComponents.md
+++ b/pelican/content/AlphaBoardComponents.md
@@ -106,7 +106,7 @@ The FPGA pad layout should be compatible with the Xilinx Artix-7 FGG484 used by
 
 
 * Suggestion for FPGA config memory is [M25P128 EEPROM from Micron](http://www.micron.com/parts/nor-flash/serial-nor-flash/m25p128-vme6gb), with a jumper controlling the write-enable pin.
-* Suggested MUX is the Quad 2-channel Analog Switch: ON Semi. MC14551B [http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF]
+* Suggested MUX is the Quad 2-channel Analog Switch: ON Semi. MC14551B <http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF>
 
 
 
@@ -130,13 +130,13 @@ Suggested components for the MKM and the switch:
 
 * Memory: Microchip serial SRAM. 23A640, 8 kByte, 8-TSSOP or 8-SOIC
 
-[http://ww1.microchip.com/downloads/en/DeviceDoc/22127a.pdf]  
+<http://ww1.microchip.com/downloads/en/DeviceDoc/22127a.pdf>  
 
 
 
 * Quad 2-channel Analog Switch: ON Semi. MC14551B
 
-[http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF]
+<http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF>
 
 
 ### Entropy Sources
@@ -201,9 +201,9 @@ The STM32 CPU supports two separate SDRAM banks. We use both of them with as big
 
 * Suggested chip: Microchip MCP79411 or MCP79412 connected to the CPU via I2C.
 
-  [http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411]  
+  <http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411>  
 
-  [http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf]  
+  <http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf>  
 
   This chip requires an external 32 kHz crystal.
 
diff --git a/pelican/content/CoretestHashesNovena.md b/pelican/content/CoretestHashesNovena.md
index 9a8ab57..fc3bc80 100644
--- a/pelican/content/CoretestHashesNovena.md
+++ b/pelican/content/CoretestHashesNovena.md
@@ -112,7 +112,7 @@ Step-by-step installation:
 
 Well, not quite.  You will need to convince the ISE that you have a license.
 
-On the page [http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm] click on the `Licensing Solutions` link.  On the resulting page, expand the section `Obtain a license for Free or Evaluation product`.  To download the ISE Webpack, you should have created an account, so now you can go to the Licensing Site and use that account to create a Certificate Based License.
+On the page <http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm> click on the `Licensing Solutions` link.  On the resulting page, expand the section `Obtain a license for Free or Evaluation product`.  To download the ISE Webpack, you should have created an account, so now you can go to the Licensing Site and use that account to create a Certificate Based License.
 
 You do not need to go through the HostID dance, just say Do It.  You will then receive a certificate in email (not an X.509 certificate) which you will be able to use.  Then start the ISE Webpack by issuing the command `ise`.  Go to the Help menu and `Manage Licenses`.  Use the resulting new License Manager window to install the .lic file.  This process is complex and flakey.
 
diff --git a/pelican/content/Dashboard.md b/pelican/content/Dashboard.md
index 7b8f609..83ecf75 100644
--- a/pelican/content/Dashboard.md
+++ b/pelican/content/Dashboard.md
@@ -65,7 +65,7 @@ Date: 2016-12-15 22:44
 | Curve25519          | Started     |                                                                 |                           |
 | Ed25519             | Not started |                                                                 |                           |
 | P-256, P-384 ECDSA  | Started     |                                                                 |                           |
-| GOST R 34.10-2001   | Started     | [https://trac.cryptech.is/browser/user/shatov/gost/streebog](https://trac.cryptech.is/browser/user/shatov/gost/streebog)  | Core in provisional repo. Will be moved to the the hash core section.|
+| GOST R 34.10-2001   | Started     | <https://trac.cryptech.is/browser/user/shatov/gost/streebog>  | Core in provisional repo. Will be moved to the the hash core section.|
 
 
 
diff --git a/pelican/content/GettingStartedNovena.md b/pelican/content/GettingStartedNovena.md
index aec3f75..b0a9270 100644
--- a/pelican/content/GettingStartedNovena.md
+++ b/pelican/content/GettingStartedNovena.md
@@ -148,4 +148,4 @@ It is strongly suggested to change the so pin and pin (in that order above) to s
 
 The lab DNSSEC signer MUST, at this point, be running on a 32-bit system in order to work with the 32-bit Novena.
 
-[https://www.dropbox.com/s/f8b4s9vic7hsqyb/cryptech-proxy-lab-20150718r2.pdf](https://www.dropbox.com/s/f8b4s9vic7hsqyb/cryptech-proxy-lab-20150718r2.pdf)
+<https://www.dropbox.com/s/f8b4s9vic7hsqyb/cryptech-proxy-lab-20150718r2.pdf>
diff --git a/pelican/content/MiscStuff.md b/pelican/content/MiscStuff.md
index 4c619c0..b4d3038 100644
--- a/pelican/content/MiscStuff.md
+++ b/pelican/content/MiscStuff.md
@@ -9,15 +9,15 @@ Advisory board, reviewers etc.
 
 ### Elliptic Curves
 
-* [http://safecurves.cr.yp.to/]. Including Curve3617.
-* [http://www.nsa.gov/ia/_files/nist-routines.pdf]. Details for implementing NIST curves.
-* [http://blog.cr.yp.to/20140323-ecdsa.html] djb on How to design an elliptic-curve signature system
+* <http://safecurves.cr.yp.to/>. Including Curve3617.
+* <http://www.nsa.gov/ia/_files/nist-routines.pdf>. Details for implementing NIST curves.
+* <http://blog.cr.yp.to/20140323-ecdsa.html> djb on How to design an elliptic-curve signature system
 
 
 
 ### Side channel attacks
 
-* [http://www.cl.cam.ac.uk/~sps32/], Dr Sergei Skorobogatov
+* <http://www.cl.cam.ac.uk/~sps32/>, Dr Sergei Skorobogatov
 * [BSI - Minimum Requirements for Evaluating Side-Channel Attack Resistance of Elliptic Curve Implementations](https://www.bsi.bund.de/SharedDocs/Downloads/DE/BSI/Zertifizierung/Interpretationen/AIS_46_ECCGuide_e_pdf.pdf)
 
 
diff --git a/pelican/content/TRNGDevelopment.md b/pelican/content/TRNGDevelopment.md
index cac7d70..d466093 100644
--- a/pelican/content/TRNGDevelopment.md
+++ b/pelican/content/TRNGDevelopment.md
@@ -8,6 +8,6 @@ One, if not THE key functionality in the Cryptech system is the True Random Numb
 
 ## Information collected
 
-* [http://digirep.rhul.ac.uk/file/315c7a7e-4963-4a62-189f-4ad198a79f30/5/Paper.pdf] (pdf) Pseudorandom Number Generation in Smart Cards:
+* <http://digirep.rhul.ac.uk/file/315c7a7e-4963-4a62-189f-4ad198a79f30/5/Paper.pdf> (pdf) Pseudorandom Number Generation in Smart Cards:
 
 An Implementation, Performance and Randomness Analysis. A paper that uses Javacard to implement different TRNGs and evluates them.
diff --git a/trac2md.py b/trac2md.py
index 7e17c5c..55ca251 100755
--- a/trac2md.py
+++ b/trac2md.py
@@ -57,7 +57,7 @@ def convert_traclink_to_creolelink(line):
         text = m.group(1).strip()
         if " " in text:
             line = line.replace(m.group(0), "[[{0[0]}|{0[1]}]]".format(text.split(" ", 1)))
-        elif any(text.startswith(scheme) for scheme in ("wiki:", "attachment:")) or camelcase_pattern.match(text):
+        elif any(text.startswith(scheme) for scheme in ("http:", "https:", "wiki:", "attachment:")) or camelcase_pattern.match(text):
             line = line.replace(m.group(0), "[[{}]]".format(text))
     return line
 
@@ -71,22 +71,15 @@ def convert_wikilinks(line, slug):
             link = link[1:-1]
         if any(text.startswith(q) and text.endswith(q) for q in ('"', "'")):
             text = text[1:-1]
-        if scheme == "attachment:":
+        if text == link and link.startswith("http") and "://" in link:
+            mdlink = "<{}>".format(link)
+        elif scheme == "attachment:":
             mdlink = "[{}]({{attach}}{}/{})".format(text, slug, link)
         elif scheme == "wiki:" or (scheme is None and camelcase_pattern.match(link)):
             mdlink = "[{}]({}.md)".format(text, link)
         else:
             mdlink = "[{}]({})".format(text, link)
-        # 
-        #whine = "/user/sra/build-tools/https-sync-repos" in line
-        whine = False
-        if whine:
-            print("Old:", line)
         line = line.replace(m.group(0), mdlink)
-        if whine:
-            print("New:", line)
-        whine = False
-        #
     return line
 
 



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