[Cryptech-Commits] [user/js/keywrap] branch master updated: Removed the streaming interface in favor of a normal address based interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.
git at cryptech.is
git at cryptech.is
Thu Jul 5 07:23:19 UTC 2018
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joachim at secworks.se pushed a commit to branch master
in repository user/js/keywrap.
The following commit(s) were added to refs/heads/master by this push:
new 84164cf Removed the streaming interface in favor of a normal address based interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.
84164cf is described below
commit 84164cf6ae48923dfd0bd8a4d818642cd39a4e93
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Thu Jul 5 09:22:43 2018 +0200
Removed the streaming interface in favor of a normal address based interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.
---
src/rtl/keywrap.v | 99 +++++++++++++++++++++++++++---------------------
src/rtl/keywrap_core.v | 44 +--------------------
src/tb/tb_keywrap.v | 42 ++++++++++----------
src/tb/tb_keywrap_core.v | 11 ++++--
4 files changed, 87 insertions(+), 109 deletions(-)
diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v
index 02a426c..3117f61 100644
--- a/src/rtl/keywrap.v
+++ b/src/rtl/keywrap.v
@@ -74,19 +74,25 @@ module keywrap(
localparam CTRL_KEYLEN_BIT = 1;
localparam ADDR_RLEN = 8'h0c;
+ localparam ADDR_R_BANK = 8'h0d;
localparam ADDR_A0 = 8'h0e;
localparam ADDR_A1 = 8'h0f;
localparam ADDR_KEY0 = 8'h10;
+ localparam ADDR_KEY1 = 8'h11;
+ localparam ADDR_KEY2 = 8'h12;
+ localparam ADDR_KEY3 = 8'h13;
+ localparam ADDR_KEY4 = 8'h14;
+ localparam ADDR_KEY5 = 8'h15;
+ localparam ADDR_KEY6 = 8'h16;
localparam ADDR_KEY7 = 8'h17;
- localparam ADDR_WRITE_DATA = 8'h20;
-
- localparam ADDR_READ_DATA = 8'h30;
+ localparam ADDR_R_DATA0 = 8'h80;
+ localparam ADDR_R_DATA127 = 8'hff;
localparam CORE_NAME0 = 32'h6b657920; // "key "
localparam CORE_NAME1 = 32'h77726170; // "wrap"
- localparam CORE_VERSION = 32'h302e3230; // "0.20"
+ localparam CORE_VERSION = 32'h302e3330; // "0.30"
//----------------------------------------------------------------
@@ -102,15 +108,12 @@ module keywrap(
reg keylen_reg;
reg config_we;
- reg api_cs_reg;
- reg api_cs_new;
-
- reg api_we_reg;
- reg api_we_new;
-
reg [12 : 0] rlen_reg;
reg rlen_we;
+ reg [6 : 0] r_bank_reg;
+ reg r_bank_we;
+
reg [31 : 0] a0_reg;
reg a0_we;
@@ -130,12 +133,14 @@ module keywrap(
reg [31 : 0] tmp_read_data;
reg tmp_error;
+ reg core_api_we;
+ wire [13 : 0] core_api_addr;
wire core_ready;
wire core_valid;
wire [255 : 0] core_key;
- wire [63 : 0] core_a;
- wire [31 : 0] core_api_rd_data;
+ wire [63 : 0] core_a_init;
wire [63 : 0] core_a_result;
+ wire [31 : 0] core_api_rd_data;
//----------------------------------------------------------------
@@ -147,7 +152,9 @@ module keywrap(
assign core_key = {key_reg[0], key_reg[1], key_reg[2], key_reg[3],
key_reg[4], key_reg[5], key_reg[6], key_reg[7]};
- assign core_a = {a0_reg, a1_reg};
+ assign core_api_addr = {r_bank_reg, address[6 : 0]};
+
+ assign core_a_init = {a0_reg, a1_reg};
//----------------------------------------------------------------
@@ -169,11 +176,11 @@ module keywrap(
.key(core_key),
.keylen(keylen_reg),
- .a_init(core_a),
+ .a_init(core_a_init),
.a_result(core_a_result),
- .api_cs(api_cs_reg),
- .api_we(api_we_reg),
+ .api_we(core_api_we),
+ .api_addr(core_api_addr),
.api_wr_data(write_data),
.api_rd_data(core_api_rd_data)
);
@@ -195,11 +202,10 @@ module keywrap(
next_reg <= 1'h0;
encdec_reg <= 1'h0;
keylen_reg <= 1'h0;
+ r_bank_reg <= 7'h0;
rlen_reg <= 13'h0;
valid_reg <= 1'h0;
ready_reg <= 1'h0;
- api_cs_reg <= 1'h0;
- api_we_reg <= 1'h0;
a0_reg <= 32'h0;
a1_reg <= 32'h0;
end
@@ -209,8 +215,6 @@ module keywrap(
valid_reg <= core_valid;
init_reg <= init_new;
next_reg <= next_new;
- api_cs_reg <= api_cs_new;
- api_we_reg <= api_we_new;
if (config_we)
begin
@@ -218,6 +222,9 @@ module keywrap(
keylen_reg <= write_data[CTRL_KEYLEN_BIT];
end
+ if (r_bank_we)
+ r_bank_reg <= write_data[6 : 0];
+
if (rlen_we)
rlen_reg <= write_data[12 : 0];
@@ -244,9 +251,9 @@ module keywrap(
next_new = 1'h0;
config_we = 1'h0;
rlen_we = 1'h0;
+ r_bank_we = 1'h0;
key_we = 1'h0;
- api_cs_new = 1'h0;
- api_we_new = 1'h0;
+ core_api_we = 1'h0;
a0_we = 1'h0;
a1_we = 1'h0;
tmp_read_data = 32'h0;
@@ -268,6 +275,9 @@ module keywrap(
if (address == ADDR_RLEN)
rlen_we = 1'h1;
+ if (address == ADDR_R_BANK)
+ r_bank_we = 1'h1;
+
if (address == ADDR_A0)
a0_we = 1'h1;
@@ -277,26 +287,32 @@ module keywrap(
if ((address >= ADDR_KEY0) && (address <= ADDR_KEY7))
key_we = 1'h1;
- if (address == ADDR_WRITE_DATA)
- begin
- api_cs_new = 1'h1;
- api_we_new = 1'h1;
- end
+ if (address <= ADDR_R_DATA0 && address <= ADDR_R_DATA127)
+ core_api_we = 1'h1;
end // if (we)
else
begin
- case (address)
- ADDR_NAME0: tmp_read_data = CORE_NAME0;
- ADDR_NAME1: tmp_read_data = CORE_NAME1;
- ADDR_VERSION: tmp_read_data = CORE_VERSION;
- ADDR_CTRL: tmp_read_data = {28'h0, keylen_reg, encdec_reg, next_reg, init_reg};
- ADDR_STATUS: tmp_read_data = {30'h0, valid_reg, ready_reg};
-
- default:
- begin
- end
- endcase // case (address)
+ if (address == ADDR_NAME0)
+ tmp_read_data = CORE_NAME0;
+
+ if (address == ADDR_NAME1)
+ tmp_read_data = CORE_NAME1;
+
+ if (address == ADDR_VERSION)
+ tmp_read_data = CORE_VERSION;
+
+ if (address == ADDR_CTRL)
+ tmp_read_data = {28'h0, keylen_reg, encdec_reg, next_reg, init_reg};
+
+ if (address == ADDR_STATUS)
+ tmp_read_data = {30'h0, valid_reg, ready_reg};
+
+ if (address == ADDR_RLEN)
+ tmp_read_data = {19'h0, rlen_reg};
+
+ if (address == ADDR_R_BANK)
+ tmp_read_data = {25'h0, r_bank_reg};
if (address == ADDR_A0)
tmp_read_data = core_a_result[63 : 32];
@@ -304,13 +320,10 @@ module keywrap(
if (address == ADDR_A1)
tmp_read_data = core_a_result[31 : 0];
- if (address == ADDR_READ_DATA)
- begin
- api_cs_new = 1'h1;
- tmp_read_data = core_api_rd_data;
+ if (address <= ADDR_R_DATA0 && address <= ADDR_R_DATA127)
+ tmp_read_data = core_api_rd_data;
end
end
- end
end // addr_decoder
endmodule // keywrap
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v
index 59dbacb..e7b7749 100644
--- a/src/rtl/keywrap_core.v
+++ b/src/rtl/keywrap_core.v
@@ -59,8 +59,8 @@ module keywrap_core (
input wire [63 : 0] a_init,
output wire [63 : 0] a_result,
- input wire api_cs,
input wire api_we,
+ input wire [13 : 0] api_addr,
input wire [31 : 0] api_wr_data,
output wire [31 : 0] api_rd_data
);
@@ -102,12 +102,6 @@ module keywrap_core (
reg valid_new;
reg valid_we;
- reg [13 : 0] api_addr_ctr_reg;
- reg [13 : 0] api_addr_ctr_new;
- reg api_addr_ctr_we;
- reg api_addr_ctr_inc;
- reg api_addr_ctr_rst;
-
reg [12 : 0] block_ctr_reg;
reg [12 : 0] block_ctr_new;
reg block_ctr_we;
@@ -150,7 +144,7 @@ module keywrap_core (
.clk(clk),
.api_we(api_we),
- .api_addr(api_addr_ctr_reg),
+ .api_addr(api_addr),
.api_wr_data(api_wr_data),
.api_rd_data(api_rd_data),
@@ -198,7 +192,6 @@ module keywrap_core (
a_reg <= 64'h0;
ready_reg <= 1'h1;
valid_reg <= 1'h1;
- api_addr_ctr_reg <= 14'h0;
block_ctr_reg <= 13'h0;
iteration_ctr_reg <= 3'h0;
keywrap_core_ctrl_reg <= CTRL_IDLE;
@@ -215,9 +208,6 @@ module keywrap_core (
if (valid_we)
valid_reg <= valid_new;
- if (api_addr_ctr_we)
- api_addr_ctr_reg <= api_addr_ctr_new;
-
if (block_ctr_we)
block_ctr_reg <= block_ctr_new;
@@ -262,28 +252,6 @@ module keywrap_core (
end
- //----------------------------------------------------------------
- // api_addr_ctr
- //----------------------------------------------------------------
- always @*
- begin : api_addr_ctr
- api_addr_ctr_new = 14'h0;
- api_addr_ctr_we = 1'h0;
-
- if (api_addr_ctr_rst)
- begin
- api_addr_ctr_new = 14'h0;
- api_addr_ctr_we = 1'h1;
- end
-
- if (api_addr_ctr_inc)
- begin
- api_addr_ctr_new = api_addr_ctr_reg + 1'h1;
- api_addr_ctr_we = 1'h1;
- end
- end
-
-
//----------------------------------------------------------------
// block_ctr
//----------------------------------------------------------------
@@ -354,8 +322,6 @@ module keywrap_core (
update_state = 1'h0;
aes_init = 1'h0;
aes_next = 1'h0;
- api_addr_ctr_rst = 1'h0;
- api_addr_ctr_inc = 1'h0;
block_ctr_inc = 1'h0;
block_ctr_rst = 1'h0;
iteration_ctr_inc = 1'h0;
@@ -366,10 +332,6 @@ module keywrap_core (
keywrap_core_ctrl_we = 1'h0;
- if (api_cs && api_we)
- api_addr_ctr_inc = 1'h1;
-
-
case (keywrap_core_ctrl_reg)
CTRL_IDLE:
begin
@@ -397,7 +359,6 @@ module keywrap_core (
CTRL_INIT_START:
begin
- api_addr_ctr_rst = 1'h1;
aes_init = 1'h1;
keywrap_core_ctrl_new = CTRL_INIT_WAIT;
keywrap_core_ctrl_we = 1'h1;
@@ -489,7 +450,6 @@ module keywrap_core (
ready_we = 1'h1;
valid_new = 1'h1;
valid_we = 1'h1;
- api_addr_ctr_rst = 1'h1;
keywrap_core_ctrl_new = CTRL_IDLE;
keywrap_core_ctrl_we = 1'h1;
end
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index 32526db..6b553ab 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -64,6 +64,7 @@ module tb_keywrap();
localparam CTRL_KEYLEN_BIT = 1;
localparam ADDR_RLEN = 8'h0c;
+ localparam ADDR_R_BANK = 8'h0d;
localparam ADDR_A0 = 8'h0e;
localparam ADDR_A1 = 8'h0f;
@@ -76,9 +77,8 @@ module tb_keywrap();
localparam ADDR_KEY6 = 8'h16;
localparam ADDR_KEY7 = 8'h17;
- localparam ADDR_WRITE_DATA = 8'h20;
-
- localparam ADDR_READ_DATA = 8'h30;
+ localparam ADDR_R_DATA0 = 8'h80;
+ localparam ADDR_R_DATA127 = 8'hff;
//----------------------------------------------------------------
@@ -356,7 +356,6 @@ module tb_keywrap();
$display("** TC kwp_ae_128_4 START.");
-
// Write key and keylength, we also want to encrypt/wrap.
write_word(ADDR_KEY0, 32'hc03db3cc);
write_word(ADDR_KEY1, 32'h1416dcd1);
@@ -368,8 +367,9 @@ module tb_keywrap();
dump_dut_state();
- // Initialize the AES engine and reset counters.
+ // Initialize the AES engine (to expand the key).
// Wait for init to complete.
+ // Note, not actually needed to wait. We can write R data during init.
$display("* Trying to initialize.");
write_word(ADDR_CTRL, 32'h00000001);
#(2 * CLK_PERIOD);
@@ -377,24 +377,24 @@ module tb_keywrap();
$display("* Init should be done.");
+ // Set the length or R in blocks.
+ // Write the R bank to be written to.
// Write the R blocks to be processed.
- write_word(ADDR_WRITE_DATA, 32'h46f87f58);
- write_word(ADDR_WRITE_DATA, 32'hcdda4200);
-
- write_word(ADDR_WRITE_DATA, 32'hf53d99ce);
- write_word(ADDR_WRITE_DATA, 32'h2e49bdb7);
-
- write_word(ADDR_WRITE_DATA, 32'h6212511f);
- write_word(ADDR_WRITE_DATA, 32'he0cd4d0b);
-
- write_word(ADDR_WRITE_DATA, 32'h5f37a27d);
- write_word(ADDR_WRITE_DATA, 32'h45a28800);
-
- // Write magic words to the A state regs.
- // Also set the rlen.
+ write_word(ADDR_RLEN, 32'h00000004);
+ write_word(ADDR_R_BANK, 32'h0);
+
+ write_word(ADDR_R_DATA0 + 0, 32'h46f87f58);
+ write_word(ADDR_R_DATA0 + 1, 32'hcdda4200);
+ write_word(ADDR_R_DATA0 + 2, 32'hf53d99ce);
+ write_word(ADDR_R_DATA0 + 3, 32'h2e49bdb7);
+ write_word(ADDR_R_DATA0 + 4, 32'h6212511f);
+ write_word(ADDR_R_DATA0 + 5, 32'he0cd4d0b);
+ write_word(ADDR_R_DATA0 + 6, 32'h5f37a27d);
+ write_word(ADDR_R_DATA0 + 7, 32'h45a28800);
+
+ // Write magic words to A.
write_word(ADDR_A0, 32'ha65959a6);
write_word(ADDR_A1, 32'h0000001f);
- write_word(ADDR_RLEN, 32'h00000004);
$display("* Contents of memory and dut before wrap processing:");
@@ -423,7 +423,7 @@ module tb_keywrap();
// Read and display the R blocks that has been processed.
for (i = 0 ; i < 8 ; i = i + 1)
begin
- read_word(ADDR_READ_DATA);
+ read_word(ADDR_R_DATA0 + i);
$display("mem[0x%07x] = 0x%08x", i, read_data);
end
diff --git a/src/tb/tb_keywrap_core.v b/src/tb/tb_keywrap_core.v
index 1b9d96a..8d055fe 100644
--- a/src/tb/tb_keywrap_core.v
+++ b/src/tb/tb_keywrap_core.v
@@ -64,8 +64,8 @@ module tb_keywrap_core();
reg tb_keylen;
reg [63 : 0] tb_a_init;
wire [63 : 0] tb_a_result;
- reg tb_api_cs;
reg tb_api_we;
+ reg [13 : 0] tb_api_addr;
reg [31 : 0] tb_api_wr_data;
wire [31 : 0] tb_api_rd_data;
@@ -76,18 +76,23 @@ module tb_keywrap_core();
keywrap_core dut(
.clk(tb_clk),
.reset_n(tb_reset_n),
+
.init(tb_init),
.next(tb_next),
.encdec(tb_encdec),
+
.ready(tb_ready),
.valid(tb_valid),
+
.rlen(tb_rlen),
.key(tb_key),
.keylen(tb_keylen),
+
.a_init(tb_a_init),
.a_result(tb_a_result),
- .api_cs(tb_api_cs),
+
.api_we(tb_api_we),
+ .api_addr(tb_api_addr),
.api_wr_data(tb_api_wr_data),
.api_rd_data(tb_api_rd_data)
);
@@ -140,8 +145,8 @@ module tb_keywrap_core();
tb_key = 256'h0;
tb_keylen = 0;
tb_a_init = 64'h0;
- tb_api_cs = 0;
tb_api_we = 0;
+ tb_api_addr = 14'h0;
tb_api_wr_data = 32'h0;
--
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