[Cryptech-Commits] [core/math/ecdsalib] 01/02: Minor fixes.

[git at cryptech.is]

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meisterpaul1 at yandex.ru pushed a commit to branch master
in repository core/math/ecdsalib.

commit 8836d99ab9af0ee4a9b2077281c1a321c61b1d22
Author: Pavel V. Shatov (Meister) <meisterpaul1 at yandex.ru>
AuthorDate: Tue Apr 17 14:45:54 2018 +0300

    Minor fixes.
---
 rtl/curve/uop/uop_add_rom.v  | 2 +-
 rtl/curve/uop/uop_conv_rom.v | 2 +-
 rtl/curve/uop/uop_dbl_rom.v  | 2 +-
 rtl/curve/uop/uop_init_rom.v | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/rtl/curve/uop/uop_add_rom.v b/rtl/curve/uop/uop_add_rom.v
index c94aaf8..2cf511b 100644
--- a/rtl/curve/uop/uop_add_rom.v
+++ b/rtl/curve/uop/uop_add_rom.v
@@ -58,7 +58,7 @@ module uop_add_rom
          6'd31:	data <= {OPCODE_MOV, UOP_SRC_ONE,   UOP_SRC_DUMMY, UOP_DST_RY,    UOP_EXEC_PZT1T2_101};
          6'd32:	data <= {OPCODE_MOV, UOP_SRC_ZERO,  UOP_SRC_DUMMY, UOP_DST_RZ,    UOP_EXEC_PZT1T2_101};
 
-         default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY};
+         default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY, UOP_EXEC_ALWAYS};
 
      endcase
 
diff --git a/rtl/curve/uop/uop_conv_rom.v b/rtl/curve/uop/uop_conv_rom.v
index dd6a7cb..aa09bbb 100644
--- a/rtl/curve/uop/uop_conv_rom.v
+++ b/rtl/curve/uop/uop_conv_rom.v
@@ -30,7 +30,7 @@ module uop_conv_rom
        6'd06:	data <= {OPCODE_MOV, UOP_SRC_ZERO, UOP_SRC_DUMMY, UOP_DST_RX,    UOP_EXEC_PZT1T2_0XX};
        6'd07:	data <= {OPCODE_MOV, UOP_SRC_ZERO, UOP_SRC_DUMMY, UOP_DST_RY,    UOP_EXEC_PZT1T2_0XX};
 
-       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY};
+       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY, UOP_EXEC_ALWAYS};
 
      endcase
 
diff --git a/rtl/curve/uop/uop_dbl_rom.v b/rtl/curve/uop/uop_dbl_rom.v
index 9ded543..0561e08 100644
--- a/rtl/curve/uop/uop_dbl_rom.v
+++ b/rtl/curve/uop/uop_dbl_rom.v
@@ -50,7 +50,7 @@ module uop_dbl_rom
          6'd25:	data <= {OPCODE_MOV, UOP_SRC_ONE,   UOP_SRC_DUMMY, UOP_DST_RY,    UOP_EXEC_PZT1T2_0XX};
          6'd26:	data <= {OPCODE_MOV, UOP_SRC_ZERO,  UOP_SRC_DUMMY, UOP_DST_RZ,    UOP_EXEC_PZT1T2_0XX};
 
-       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY};
+       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY, UOP_EXEC_ALWAYS};
 
      endcase
 
diff --git a/rtl/curve/uop/uop_init_rom.v b/rtl/curve/uop/uop_init_rom.v
index 3863dbf..0142c4c 100644
--- a/rtl/curve/uop/uop_init_rom.v
+++ b/rtl/curve/uop/uop_init_rom.v
@@ -15,7 +15,7 @@ module uop_init_rom
 
 
    //
-   // Doubling Microprogram
+   // Initialization Microprogram
    //
    always @(posedge clk)
 
@@ -25,7 +25,7 @@ module uop_init_rom
        6'd01:	data <= {OPCODE_MOV, UOP_SRC_ONE,  UOP_SRC_DUMMY, UOP_DST_RY, UOP_EXEC_ALWAYS};
        6'd02:	data <= {OPCODE_MOV, UOP_SRC_ZERO, UOP_SRC_DUMMY, UOP_DST_RZ, UOP_EXEC_ALWAYS};
 
-       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY};
+       default:	data <= {OPCODE_RDY, UOP_SRC_DUMMY, UOP_SRC_DUMMY, UOP_DST_DUMMY, UOP_EXEC_ALWAYS};
 
      endcase