[Cryptech-Commits] [user/shatov/modexp_fpga_model] branch master updated (e91ce07 -> 9e56430)

[git at cryptech.is]

This is an automated email from the git hooks/post-receive script.

meisterpaul1 at yandex.ru pushed a change to branch master
in repository user/shatov/modexp_fpga_model.

    from e91ce07  Follow what Verilog does more precisely.
     new 6e36e87  Triple multiplier turns out to be an overkill in Verilog, started turning systolic multiplication into a separate procedure.
     new ee41d58  Turned systolic multiplication into a separate routine.
     new 9e56430  Minor update, there's no need to update Aj inside of systolic loop.

The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "add" were already present in the repository and have only
been added to this reference.


Summary of changes:
 modexp_fpga_model.h                              |   2 +-
 modexp_fpga_model_montgomery.cpp                 | 128 ++++-------------------
 modexp_fpga_model_pe.cpp                         |   1 -
 modexp_fpga_systolic.cpp                         | 123 ++++++++++++++++++++++
 modexp_fpga_model_pe.h => modexp_fpga_systolic.h | 101 +++++++++---------
 5 files changed, 193 insertions(+), 162 deletions(-)
 create mode 100644 modexp_fpga_systolic.cpp
 copy modexp_fpga_model_pe.h => modexp_fpga_systolic.h (80%)