[Cryptech-Commits] [staging/core/rng/trng] 17/30: Updates after synthesis of the complete trng.

git at cryptech.is git at cryptech.is
Tue Mar 17 13:19:06 UTC 2015


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paul at psgd.org pushed a commit to branch master
in repository staging/core/rng/trng.

commit 830dcc0ea4bfc79dfc7b96d57d8e203096ed0374
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Thu Sep 18 18:35:08 2014 +0200

    Updates after synthesis of the complete trng.
---
 src/rtl/trng.v        | 146 +++++++++++++++++++++++++++++++++++---------------
 src/rtl/trng_csprng.v |   4 --
 2 files changed, 103 insertions(+), 47 deletions(-)

diff --git a/src/rtl/trng.v b/src/rtl/trng.v
index 0d6b7b0..29a4d11 100644
--- a/src/rtl/trng.v
+++ b/src/rtl/trng.v
@@ -1,4 +1,4 @@
- //======================================================================
+//======================================================================
 //
 // trng.v
 // --------
@@ -51,6 +51,7 @@ module trng(
             output wire          error,
 
             output wire  [7 : 0] debug,
+            input wire           debug_update,
 
             output wire          security_error
            );
@@ -88,6 +89,8 @@ module trng(
 
   parameter ADDR_ENTROPY2_RAW           = 8'h60;
   parameter ADDR_ENTROPY2_STATS         = 8'h61;
+  parameter ADDR_ENTROPY2_OP_A          = 8'h68;
+  parameter ADDR_ENTROPY2_OP_B          = 8'h69;
 
 
   parameter TRNG_NAME0   = 32'h74726e67; // "trng"
@@ -126,15 +129,23 @@ module trng(
   reg          entropy2_enable_new;
   reg          entropy2_enable_we;
 
-  reg         enable_reg;
-  reg         enable_new;
-  reg         enable_we;
+  reg [31 : 0] entropy2_op_a_reg;
+  reg [31 : 0] entropy2_op_a_new;
+  reg          entropy2_op_a_we;
+
+  reg [31 : 0] entropy2_op_b_reg;
+  reg [31 : 0] entropy2_op_b_new;
+  reg          entropy2_op_b_we;
 
-  reg         csprng_seed_reg;
-  reg         csprng_seed_new;
+  reg          enable_reg;
+  reg          enable_new;
+  reg          enable_we;
 
-  reg         csprng_rnd_ack_reg;
-  reg         csprng_rnd_ack_new;
+  reg          csprng_seed_reg;
+  reg          csprng_seed_new;
+
+  reg          csprng_rnd_ack_reg;
+  reg          csprng_rnd_ack_new;
 
 
 
@@ -164,6 +175,7 @@ module trng(
   wire           entropy2_syn;
   wire [31 : 0]  entropy2_data;
   wire           entropy2_ack;
+  wire [7 : 0]   entropy2_debug;
 
   wire           mixer_enable;
   wire [511 : 0] mixer_seed_data;
@@ -191,7 +203,7 @@ module trng(
   assign read_data      = tmp_read_data;
   assign error          = tmp_error;
   assign security_error = 0;
-  assign debug          = 0;
+  assign debug          = entropy2_debug;
 
   assign csprng_num_blocks = {csprng_num_blocks_high_reg,
                               csprng_num_blocks_low_reg};
@@ -206,6 +218,18 @@ module trng(
   assign csprng_seed       = csprng_seed_reg;
   assign csprng_debug_mode = 0;
 
+  // Patches to get our first version to work.
+  assign entropy0_enabled = 0;
+  assign entropy0_raw     = 32'h00000000;
+  assign entropy0_stats   = 32'h00000000;
+  assign entropy0_syn     = 0;
+  assign entropy0_data    = 32'h00000000;
+
+  assign entropy1_enabled = 1;
+
+  assign entropy2_enabled = 1;
+  assign entropy2_stats   = 32'h00000000;
+
 
   //----------------------------------------------------------------
   // core instantiations.
@@ -259,52 +283,59 @@ module trng(
                      .rnd_ack(csprng_rnd_ack_reg)
                     );
 
-  pseudo_entropy entropy0(
-                          .clk(clk),
-                          .reset_n(reset_n),
-
-                          .enable(entropy0_enable),
-
-                          .raw_entropy(entropy0_raw),
-                          .stats(entropy0_stats),
-
-                          .enabled(entropy0_enabled),
-                          .entropy_syn(entropy0_syn),
-                          .entropy_data(entropy0_data),
-                          .entropy_ack(entropy0_ack)
-                         );
+//  pseudo_entropy entropy0(
+//                          .clk(clk),
+//                          .reset_n(reset_n),
+//
+//                          .enable(entropy0_enable),
+//
+//                          .raw_entropy(entropy0_raw),
+//                          .stats(entropy0_stats),
+//
+//                          .enabled(entropy0_enabled),
+//                          .entropy_syn(entropy0_syn),
+//                          .entropy_data(entropy0_data),
+//                          .entropy_ack(entropy0_ack)
+//                         );
 
-  avalance_entropy_core entropy1(
+  avalanche_entropy_core entropy1(
                                  .clk(clk),
                                  .reset_n(reset_n),
 
-                                 .enable(entropy1_enable),
-
                                  .noise(avalanche_noise),
+                                 .sampled_noise(),
+                                 .entropy(),
 
-                                 .raw_entropy(entropy1_raw),
-                                 .stats(entropy1_stats),
-
-                                 .enabled(entropy1_enabled),
                                  .entropy_syn(entropy1_syn),
                                  .entropy_data(entropy1_data),
-                                 .entropy_ack(entropy1_ack)
+                                 .entropy_ack(entropy1_ack),
+
+                                 .led(),
+                                 .debug_data(entropy1_raw),
+                                 .debug_clk(),
+
+                                 .delta_data(entropy1_stats),
+                                 .delta_clk()
                                 );
 
-  ringosc_entropy entropy2(
-                           .clk(clk),
-                           .reset_n(reset_n),
+  rosc_entropy_core entropy2(
+                             .clk(clk),
+                             .reset_n(reset_n),
 
-                           .enable(entropy2_enable),
+                             .enable(entropy2_enable),
 
-                           .raw_entropy(entropy2_raw),
-                           .stats(entropy2_stats),
+                             .opa(entropy2_op_a_reg),
+                             .opb(entropy2_op_b_reg),
 
-                           .enabled(entropy2_enabled),
-                           .entropy_syn(entropy2_syn),
-                           .entropy_data(entropy2_data),
-                           .entropy_ack(entropy2_ack)
-                          );
+                             .entropy(entropy2_raw),
+
+                             .rnd_data(entropy2_data),
+                             .rnd_valid(entropy2_syn),
+                             .rnd_ack(entropy2_ack),
+
+                             .debug(entropy2_debug),
+                             .debug_update(debug_update)
+                            );
 
 
   //----------------------------------------------------------------
@@ -321,6 +352,8 @@ module trng(
           entropy0_enable_reg        <= 1;
           entropy1_enable_reg        <= 1;
           entropy2_enable_reg        <= 1;
+          entropy2_op_a_reg          <= 32'h01010101;
+          entropy2_op_a_reg          <= 32'h10101010;
           enable_reg                 <= 1;
           csprng_rnd_ack_reg         <= 0;
           csprng_seed_reg            <= 0;
@@ -328,7 +361,6 @@ module trng(
           csprng_num_blocks_low_reg  <= CSPRNG_DEFAULT_NUM_BLOCKS[31 : 0];
           csprng_num_blocks_high_reg <= CSPRNG_DEFAULT_NUM_BLOCKS[63 : 32];
         end
-
       else
         begin
           csprng_rnd_ack_reg <= csprng_rnd_ack_new;
@@ -349,6 +381,16 @@ module trng(
               entropy2_enable_reg <= entropy2_enable_new;
             end
 
+          if (entropy2_op_a_we)
+            begin
+              entropy2_op_a_reg <= entropy2_op_a_new;
+            end
+
+          if (entropy2_op_b_we)
+            begin
+              entropy2_op_b_reg <= entropy2_op_b_new;
+            end
+
           if (enable_we)
             begin
               enable_reg <= enable_new;
@@ -386,6 +428,10 @@ module trng(
       entropy1_enable_we         = 0;
       entropy2_enable_new        = 0;
       entropy2_enable_we         = 0;
+      entropy2_op_a_new          = 32'h00000000;
+      entropy2_op_a_we           = 0;
+      entropy2_op_b_new          = 32'h00000000;
+      entropy2_op_b_we           = 0;
       enable_new                 = 0;
       enable_we                  = 0;
       csprng_seed_new            = 0;
@@ -404,6 +450,7 @@ module trng(
         begin
           if (we)
             begin
+              // Write operations.
               case (address)
                 // Write operations.
                 ADDR_TRNG_CTRL:
@@ -437,6 +484,18 @@ module trng(
                     csprng_num_blocks_high_we  = 1;
                   end
 
+                ADDR_ENTROPY2_OP_A:
+                  begin
+                    entropy2_op_a_new = write_data;
+                    entropy2_op_a_we  = 1;
+                  end
+
+                ADDR_ENTROPY2_OP_B:
+                  begin
+                    entropy2_op_b_new = write_data;
+                    entropy2_op_b_we  = 1;
+                  end
+
                 default:
                   begin
                     tmp_error = 1;
@@ -446,6 +505,7 @@ module trng(
 
           else
             begin
+              // Read operations.
               case (address)
                 // Read operations.
                 ADDR_NAME0:
diff --git a/src/rtl/trng_csprng.v b/src/rtl/trng_csprng.v
index 1bdc737..f9869db 100644
--- a/src/rtl/trng_csprng.v
+++ b/src/rtl/trng_csprng.v
@@ -136,8 +136,6 @@ module trng_csprng(
   wire           cipher_data_out_valid;
   wire           cipher_ready;
 
-  reg            discard_outputs;
-
   wire           fifo_more_data;
   reg            fifo_discard;
   wire           fifo_rnd_syn;
@@ -323,7 +321,6 @@ module trng_csprng(
       ready_we               = 0;
       error_new              = 0;
       error_we               = 0;
-      discard_outputs        = 0;
       seed_ack_new           = 0;
       more_seed_new          = 0;
       fifo_discard           = 0;
@@ -498,7 +495,6 @@ module trng_csprng(
             cipher_block_new = {16{32'h00000000}};
             cipher_block_we  = 1;
             block_ctr_rst    = 1;
-            discard_outputs  = 1;
             csprng_ctrl_new  = CTRL_IDLE;
             csprng_ctrl_we   = 1;
           end



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