[Cryptech-Commits] [staging/core/rng/trng] 14/30: Adding initial version of wrapper for the avalance entropy core to be used during synthesis.

git at cryptech.is git at cryptech.is
Tue Mar 17 13:19:03 UTC 2015


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paul at psgd.org pushed a commit to branch master
in repository staging/core/rng/trng.

commit 3b2be624c6867da6a744e80cf3e2c0eca9375933
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Tue Sep 16 17:31:19 2014 +0200

    Adding initial version of wrapper for the avalance entropy core to be used during synthesis.
---
 src/rtl/wrappers/trng_avalanche_entropy.v | 123 ++++++++++++++++++++++++++++++
 1 file changed, 123 insertions(+)

diff --git a/src/rtl/wrappers/trng_avalanche_entropy.v b/src/rtl/wrappers/trng_avalanche_entropy.v
new file mode 100644
index 0000000..d49e684
--- /dev/null
+++ b/src/rtl/wrappers/trng_avalanche_entropy.v
@@ -0,0 +1,123 @@
+ //======================================================================
+//
+// trng_avalanche_entropy.v
+// ------------------------
+// Wrapper for the avalanche entropy core to adapt it to the trng.
+//
+//
+// Author: Joachim Strombergson
+// Copyright (c) 2014, NORDUnet A/S All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+//   this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+//   notice, this list of conditions and the following disclaimer in the
+//   documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+//   be used to endorse or promote products derived from this software
+//   without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module trng_avalanche_entropy(
+                              // Clock and reset.
+                              input wire           clk,
+                              input wire           reset_n,
+
+                              input wire           noise,
+
+                              output wire [31 : 0] raw_entropy,
+                              output wire [31 : 0] stats,
+
+                              output wire          enabled,
+                              output wire          entropy_syn,
+                              output wire [31 : 0] entropy_data,
+                              input wire           entropy_ack
+                             );
+
+
+  //----------------------------------------------------------------
+  // Internal constant and parameter definitions.
+  //----------------------------------------------------------------
+
+
+  //----------------------------------------------------------------
+  // Registers including update variables and write enable.
+  //----------------------------------------------------------------
+
+
+
+  //----------------------------------------------------------------
+  // Wires.
+  //----------------------------------------------------------------
+
+
+  //----------------------------------------------------------------
+  // Concurrent connectivity for ports etc.
+  //----------------------------------------------------------------
+
+
+  //----------------------------------------------------------------
+  // core instantiations.
+  //----------------------------------------------------------------
+  avalance_entropy_core core(
+                             .clk(clk),
+                             .reset_n(reset_n),
+
+                             .enable(entropy1_enable),
+
+                             .noise(avalanche_noise),
+
+                             .raw_entropy(entropy1_raw),
+                             .stats(entropy1_stats),
+
+                             .enabled(entropy1_enabled),
+                             .entropy_syn(entropy1_syn),
+                             .entropy_data(entropy1_data),
+                             .entropy_ack(entropy1_ack),
+                             .led()
+                            );
+
+
+  //----------------------------------------------------------------
+  // reg_update
+  //
+  // Update functionality for all registers in the core.
+  // All registers are positive edge triggered with asynchronous
+  // active low reset. All registers have write enable.
+  //----------------------------------------------------------------
+  always @ (posedge clk or negedge reset_n)
+    begin
+      if (!reset_n)
+        begin
+
+        end
+
+      else
+        begin
+
+        end
+    end // reg_update
+
+endmodule // trng_avalanche_entropy
+
+//======================================================================
+// EOF trng_avalanche_entropy.v
+//======================================================================



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