[Cryptech-Commits] [staging/core/rng/avalanche_entropy] 08/08: Adding hard coded core name and version strings accessible through the core api.

[git at cryptech.is]

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paul at psgd.org pushed a commit to branch master
in repository staging/core/rng/avalanche_entropy.

commit e824aac0bcc65c877cb22a0168ffa7735ee75677
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Fri Nov 14 13:10:41 2014 +0100

    Adding hard coded core name and version strings accessible through the core api.
---
 src/rtl/avalanche_entropy.v | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/src/rtl/avalanche_entropy.v b/src/rtl/avalanche_entropy.v
index bbaa770..a9f69c9 100644
--- a/src/rtl/avalanche_entropy.v
+++ b/src/rtl/avalanche_entropy.v
@@ -72,6 +72,10 @@ module avalanche_entropy(
   //----------------------------------------------------------------
   // Internal constant and parameter definitions.
   //----------------------------------------------------------------
+  parameter ADDR_NAME0              = 8'h00;
+  parameter ADDR_NAME1              = 8'h01;
+  parameter ADDR_VERSION            = 8'h02;
+
   parameter ADDR_CTRL               = 8'h10;
   parameter CTRL_ENABLE_BIT         = 0;
 
@@ -82,6 +86,11 @@ module avalanche_entropy(
   parameter ADDR_DELTA              = 8'h30;
 
 
+  parameter CORE_NAME0              = 32'h6578746e; // "extn"
+  parameter CORE_NAME1              = 32'h6f697365; // "oise"
+  parameter CORE_VERSION            = 32'h302e3130; // "0.10"
+
+
   //----------------------------------------------------------------
   // Registers including update variables and write enable.
   //----------------------------------------------------------------
@@ -178,10 +187,24 @@ module avalanche_entropy(
                   end
               endcase // case (address)
             end // if (we)
-
           else
             begin
               case (address)
+                ADDR_NAME0:
+                  begin
+                    tmp_read_data = CORE_NAME0;
+                  end
+
+                ADDR_NAME1:
+                  begin
+                    tmp_read_data = CORE_NAME1;
+                  end
+
+                ADDR_VERSION:
+                  begin
+                    tmp_read_data = CORE_VERSION;
+                  end
+
                 ADDR_CTRL:
                   begin
                     tmp_read_data = {31'h00000000, enable_reg};