[Cryptech-Commits] [staging/core/comm/uart] 06/13: Adding size constraints to constant definitions to remove synthesis warnings.

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paul at psgd.org pushed a commit to branch master
in repository staging/core/comm/uart.

commit b250c13a0dda87d74ef35e8d1fb4f04e0b30949c
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Mon Mar 17 09:13:00 2014 +0100

    Adding size constraints to constant definitions to remove synthesis warnings.
---
 src/rtl/uart.v | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/rtl/uart.v b/src/rtl/uart.v
index abf3934..d5a5a86 100644
--- a/src/rtl/uart.v
+++ b/src/rtl/uart.v
@@ -99,11 +99,11 @@ module uart(
   // Clock: 50 MHz
   // Bitrate: 19200 bps
   // Divisor = 50*10E6 / 9600 = 5208
-  parameter DEFAULT_CLK_RATE      = 5208;
+  parameter DEFAULT_CLK_RATE      = 16'd5208;
   parameter DEFAULT_HALF_CLK_RATE = DEFAULT_CLK_RATE / 2;
 
-  parameter DEFAULT_DATA_BITS = 8;
-  parameter DEFAULT_STOP_BITS = 1;
+  parameter DEFAULT_DATA_BITS = 4'h8;
+  parameter DEFAULT_STOP_BITS = 2'h2;
  
   
   //----------------------------------------------------------------