[Cryptech-Commits] [staging/core/comm/coretest] 04/10: Adding extra state to fix combinational loop.

[git at cryptech.is]

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paul at psgd.org pushed a commit to branch master
in repository staging/core/comm/coretest.

commit 448d71f0095bf75b0554be3fcc9b81b5ae7ae97f
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Tue Apr 29 09:37:58 2014 +0200

    Adding extra state to fix combinational loop.
---
 src/rtl/coretest.v | 55 ++++++++++++++++++++++++++++++++----------------------
 1 file changed, 33 insertions(+), 22 deletions(-)

diff --git a/src/rtl/coretest.v b/src/rtl/coretest.v
index 92fab28..c8172a5 100644
--- a/src/rtl/coretest.v
+++ b/src/rtl/coretest.v
@@ -82,11 +82,13 @@ module coretest(
   parameter RESET_OK = 8'h7d;
 
   // rx_engine states.
-  parameter RX_IDLE = 3'h0;
-  parameter RX_SYN  = 3'h1;
-  parameter RX_ACK  = 3'h2;
-  parameter RX_CMD  = 3'h3;
-  parameter RX_DONE = 3'h4;
+  parameter RX_IDLE  = 3'h0;
+  parameter RX_SYN   = 3'h1;
+  parameter RX_ACK   = 3'h2;
+  parameter RX_NSYN  = 3'h4;
+  parameter RX_PARSE = 3'h5;
+  parameter RX_CMD   = 3'h6;
+  parameter RX_DONE  = 3'h7;
 
   // rx_engine states.
   parameter TX_IDLE  = 3'h0;
@@ -541,29 +543,38 @@ module coretest(
                 rx_engine_we  = 1;
               end
           end
-        
+
         RX_ACK:
           begin
             rx_ack_new = 1;
             rx_ack_we  = 1;
+            rx_engine_new = RX_NSYN;
+            rx_engine_we  = 1;
+          end
 
+        RX_NSYN:
+          begin
             if (!rx_syn_reg)
               begin
-                rx_ack_new = 0;
-                rx_ack_we  = 1;
-                
-                if (rx_buffer[rx_buffer_ptr_reg] == EOC)
-                  begin
-                    rx_engine_new = RX_DONE;
-                    rx_engine_we  = 1;
-                  end
-
-                else
-                  begin
-                    rx_buffer_ptr_inc = 1;
-                    rx_engine_new     = RX_IDLE;
-                    rx_engine_we      = 1;
-                  end
+                rx_engine_new = RX_PARSE;
+                rx_engine_we  = 1;
+              end
+          end
+
+        RX_PARSE:
+          begin
+            rx_ack_new = 0;
+            rx_ack_we  = 1;
+            if (rx_buffer[rx_buffer_ptr_reg] == EOC)
+              begin
+                rx_engine_new = RX_DONE;
+                rx_engine_we  = 1;
+              end
+            else
+              begin
+                rx_buffer_ptr_inc = 1;
+                rx_engine_new     = RX_IDLE;
+                rx_engine_we      = 1;
               end
           end
 
@@ -584,7 +595,7 @@ module coretest(
                 rx_engine_new     = RX_IDLE;
                 rx_engine_we      = 1;
               end
-        
+
         default:
           begin
             rx_buffer_ptr_rst = 1;