[Cryptech-Commits] [user/js/test/novena_eim_base] 02/02: Commented out the clock implementation for eim.

[git at cryptech.is]

This is an automated email from the git hooks/post-receive script.

joachim at secworks.se pushed a commit to branch master
in repository user/js/test/novena_eim_base.

commit f11b1f78324165eaafff7caf0d3a187815ac5c97
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Wed Jan 21 13:46:19 2015 +0100

    Commented out the clock implementation for eim.
---
 src/rtl/novena_fpga_clocks.v | 83 ++++++++++++++++++++++++--------------------
 1 file changed, 45 insertions(+), 38 deletions(-)

diff --git a/src/rtl/novena_fpga_clocks.v b/src/rtl/novena_fpga_clocks.v
index bdb6bcd..c6ae415 100644
--- a/src/rtl/novena_fpga_clocks.v
+++ b/src/rtl/novena_fpga_clocks.v
@@ -45,9 +45,9 @@ module novena_fpga_clocks(
                           // assoicated I/O clocks.
                           // NOTE: doesn't run until first CPU access
                           // to EIM; then free-runs at 133 MHz
-                          output wire bclk,
-                          output wire bclk_i,
-                          output wire bclk_o
+                          output wire eim_bclk,
+                          output wire eim_bclk_i,
+                          output wire eim_bclk_o
 	                 );
 
 
@@ -61,43 +61,50 @@ module novena_fpga_clocks(
 
   //----------------------------------------------------------------
   // EIM Burst clock including generation of I/O clocks etc.
-  // We need
   //----------------------------------------------------------------
-  wire bclk_dll;
-  wire bclk_div2_dll;
-  wire bclk_div4_dll;
-  wire bclk_locked;
-  wire bclk_early;
-  wire bclk_int_in;
-  wire bclk_io_in;
-  wire bclk_int_in;
-  wire bclk_io_in;
-  wire i_reset, i_locked;
-  wire o_reset, o_locked;
-  wire bclk_i, bclk_o;
-  wire i_fbk_out, i_fbk_in;
-  wire o_fbk_out, o_fbk_in;
-
-  IBUFG clkibufg(.I(EIM_BCLK), .O(bclk));
-
-  BUFG bclk_dll_bufg(.I(bclk), .O(bclk_int_in));
-
-  bclk_dll bclk_dll_mod(.clk133in(bclk_int_in), .clk133(bclk_dll),
-			.RESET(reset), .LOCKED(bclk_locked));
-
-
-   dcm_delay bclk_i_dll(.clk133(bclk_int_in), .clk133out(bclk_i),
-			.CLKFB_IN(i_fbk_in), .CLKFB_OUT(i_fbk_out),
-			.RESET(i_reset), .LOCKED(i_locked));
-
-   dcm_delay bclk_o_dll(.clk133(bclk_int_in), .clk133out(bclk_o),
-			.CLKFB_IN(o_fbk_in), .CLKFB_OUT(o_fbk_out),
-			.RESET(o_reset), .LOCKED(o_locked));
-
-   // lock it to the input path
-   BUFIO2FB bclk_o_fbk(.I(bclk_o), .O(o_fbk_in));
+//  wire bclk_dll;
+//  wire bclk_div2_dll;
+//  wire bclk_div4_dll;
+//  wire bclk_locked;
+//  wire bclk_early;
+//  wire bclk_int_in;
+//  wire bclk_io_in;
+//  wire bclk_int_in;
+//  wire bclk_io_in;
+//  wire i_reset, i_locked;
+//  wire o_reset, o_locked;
+//  wire bclk_i, bclk_o;
+//  wire i_fbk_out, i_fbk_in;
+//  wire o_fbk_out, o_fbk_in;
+//
+//  IBUFG clkibufg(.I(EIM_BCLK), .O(bclk));
+//
+//  BUFG bclk_dll_bufg(.I(bclk), .O(bclk_int_in));
+//
+//  bclk_dll bclk_dll_mod(.clk133in(bclk_int_in), .clk133(bclk_dll),
+//			.RESET(reset), .LOCKED(bclk_locked));
+//
+//
+//   dcm_delay bclk_i_dll(.clk133(bclk_int_in), .clk133out(bclk_i),
+//			.CLKFB_IN(i_fbk_in), .CLKFB_OUT(i_fbk_out),
+//			.RESET(i_reset), .LOCKED(i_locked));
+//
+//   dcm_delay bclk_o_dll(.clk133(bclk_int_in), .clk133out(bclk_o),
+//			.CLKFB_IN(o_fbk_in), .CLKFB_OUT(o_fbk_out),
+//			.RESET(o_reset), .LOCKED(o_locked));
+//
+//   // lock it to the input path
+//  BUFIO2FB bclk_o_fbk(.I(bclk_o), .O(o_fbk_in));
+//
+//  assign i_fbk_in = bclk_i;
+//
+//  assign eim_bclk = bclk_dll;
+//  assign eim_bclk_i = bclk_i;
+//  assign eim_bclk_o = bclk_o;
 
-   assign i_fbk_in = bclk_i;
+  assign eim_bclk   = 1'b0;
+  assign eim_bclk_i = 1'b0;
+  assign eim_bclk_o = 1'b0;
 
 
   //----------------------------------------------------------------