[Cryptech-Commits] [test/novena_base] branch master updated (a758f34 -> 8f0faf9)

git at cryptech.is git at cryptech.is
Thu Feb 12 23:55:05 UTC 2015


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paul at psgd.org pushed a change to branch master
in repository test/novena_base.

      from  a758f34   Adding ports for the core selector to include Cryptech ports. Moving the Cryptech blinkenlights logic into core select.
      adds  86311d7   Changed core_selector to instead use the cryptech sha256 core.
      adds  f1fe070   Added real prefix detection of sha255 core.
      adds  eff7520   Passes build without any warnings.
      adds  533b26e   Adding initial version of test code for sha256 core.
      adds  860671f   Fixed name.
      adds  a4edc78   Completed first test program for sha256 core.
      adds  8bcab15   More attempts at getting the addresss decoder to work...
      adds  e71ca2c   Adding first base with sha256.
      adds  f0ded92   (1) Updated core selector with logic to connect sha256. (2) Adding test sw that is able to talk to the sha256 core and perform a hash operation.
      adds  01669dc   change 'unsigned int' to the more explicit 'uint32_t'
      adds  1f8d768   port hash_tester to this version of novena_eim
      adds  3914059   (1) Adding symbols for all registers in the sha256 api.
      adds  d9e9033   Adding NIST test vectors for single and dual block sha256 tests. Adding function stubs for tests.
      adds  34b329c   (1) Adding test code to do single block hash. (2) Adding helper function for reading data from FPGA registers. (3) Moving eim config to separate function.
      adds  ba90998   Merge branch 'sha256_core' of git.cryptech.is:test/novena_base into sha256_core
      adds  b4f9c86   fix a few warnings and one error
      adds  13b8166   add all SHA cores (hello coretest_hashes)
      adds  560ebac   Updates from Pavel with new mux.
      adds  0e4e0b5   First stage of integration cleanup.
      adds  5f769e9   Reformat verilog code for readability.
      adds  ba254d4   Reformat C code for readability, remove non-API stuff from novena-eim.h, change eim_setup() success value to 0.
      adds  f135907   Change bitfield types back to unsigned int.
       new  8f0faf9   Merge branch 'coretest_hashes' of git.cryptech.is:test/novena_base into master

The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.


Summary of changes:
 doc/EIM_Memory_Map.doc                      | Bin 0 -> 86016 bytes
 rtl/build/Makefile                          |  28 +-
 rtl/iseconfig/novena_baseline.xise          | 108 +++-
 rtl/iseconfig/novena_baseline_top_guide.ncd |   2 +-
 rtl/src/ipcore/clkmgr_dcm.gise              |  23 +-
 rtl/src/ipcore/clkmgr_dcm.ncf               | 120 ++--
 rtl/src/ipcore/clkmgr_dcm.xise              | 339 +----------
 rtl/src/testbench/tb_demo_adder.v           |  22 +-
 rtl/src/ucf/novena_baseline.ucf             |  29 +-
 rtl/src/verilog/cdc_bus_pulse.v             | 199 +++----
 rtl/src/verilog/cipher_selector.v           | 117 ++++
 rtl/src/verilog/core_selector.v             | 375 +++++++-----
 rtl/src/verilog/demo_adder.v                | 108 ----
 rtl/src/verilog/eim_arbiter.v               | 503 ++++++++--------
 rtl/src/verilog/eim_arbiter_cdc.v           | 200 ++++---
 rtl/src/verilog/eim_da_phy.v                |  74 +--
 rtl/src/verilog/eim_indicator.v             |  49 +-
 rtl/src/verilog/eim_memory.v                | 182 ++++++
 rtl/src/verilog/novena_baseline_top.v       | 276 ++++-----
 rtl/src/verilog/novena_clkmgr.v             | 142 ++---
 rtl/src/verilog/novena_regs.v               | 126 ++++
 rtl/src/verilog/rng_selector.v              | 112 ++++
 rtl/src/verilog/sha1.v                      | 204 +++++++
 rtl/src/verilog/sha256.v                    | 204 +++++++
 rtl/src/verilog/sha512.v                    | 241 ++++++++
 sw/Makefile                                 |  14 +
 sw/hash_tester.c                            | 876 ++++++++++++++++++++++++++++
 sw/novena-eim.c                             | 708 ++++++++++++++++++++++
 sw/novena-eim.h                             |  52 ++
 sw/test-adder/Makefile                      |  11 -
 sw/test-adder/novena-eim.c                  | 456 ---------------
 sw/test-adder/novena-eim.h                  | 321 ----------
 sw/test-adder/test-adder.c                  | 245 --------
 toolruns/ise/novena/novena_baseline_top.bit | Bin 0 -> 1484509 bytes
 34 files changed, 4007 insertions(+), 2459 deletions(-)
 create mode 100644 doc/EIM_Memory_Map.doc
 create mode 100644 rtl/src/verilog/cipher_selector.v
 delete mode 100644 rtl/src/verilog/demo_adder.v
 create mode 100644 rtl/src/verilog/eim_memory.v
 create mode 100644 rtl/src/verilog/novena_regs.v
 create mode 100644 rtl/src/verilog/rng_selector.v
 create mode 100644 rtl/src/verilog/sha1.v
 create mode 100644 rtl/src/verilog/sha256.v
 create mode 100644 rtl/src/verilog/sha512.v
 create mode 100755 sw/Makefile
 create mode 100644 sw/hash_tester.c
 create mode 100644 sw/novena-eim.c
 create mode 100644 sw/novena-eim.h
 delete mode 100755 sw/test-adder/Makefile
 delete mode 100644 sw/test-adder/novena-eim.c
 delete mode 100644 sw/test-adder/novena-eim.h
 delete mode 100644 sw/test-adder/test-adder.c
 create mode 100644 toolruns/ise/novena/novena_baseline_top.bit



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