[Cryptech Tech] Basic RSA signature speed with fmc_clk_60MHz

Rob Austein sra at hactrn.net
Sat Sep 29 17:49:31 UTC 2018


rsa_1024 sigs/sec 15.5909778067 secs/sig 0:00:00.064139 mean 0:00:00.063798 (n 1000, c 1 t0 2018-09-29 13:08:21.543547 t1 2018-09-29 13:09:25.683206)
rsa_2048 sigs/sec 6.21935339759 secs/sig 0:00:00.160788 mean 0:00:00.160288 (n 1000, c 1 t0 2018-09-29 13:09:27.842942 t1 2018-09-29 13:12:08.631361)
rsa_4096 sigs/sec 1.52938579376 secs/sig 0:00:00.653857 mean 0:00:00.653042 (n 1000, c 1 t0 2018-09-29 13:12:10.823179 t1 2018-09-29 13:23:04.680436)

This is for a single client, using a bitstream with the FPGA clocked
at 60MHz from the FMC bus, with two ModExpA7 cores (so can do one RSA
signature at a time, using the two cores in parallel for the two
modexps in the CRT algorithm).

Since this bitstream doesn't include enough cores to do more than one
signature at a time, attempting multiple clients is not all that
interesting except for triggering an as yet unsolved race condition.

If I have time before the upcoming face to face meeting I'll try
building a bitstream with six or eight ModExp cores so we can try
multiple clients.


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