[Cryptech Tech] Happier RSA timing numbers

[Joachim Strömbergson]

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 conAloha!

Rob Austein wrote:
> I think that [7] answers your question to the extent that the
> current profiling code is going to be able to do so: out of the 258
> total seconds we spent fetching from the keystore, we spent about 20
> on FMC write, 18 on FMC read, and 98 twiddling our thumbs waiting for
> the AES core.

Ok, so this is highly interesting. You mention below that there might
have been more than one AES core. But for the sake of analysis, lets see
if we can improve the performance.

I can build a modified version of the AES core with 16 Sboxes. This
should cut those 98 seconds to 25 or so. That is fairly easy to do and I
can start doing that on Tuesday. Ok?

I think this is way more important to spend time on than the FPGA based
master key memory.

One thing I haven't considered is how key expansion is done. Today the
key expansion is triggered when performing an "init" of the core. Since
the core is ECB you should only need to do "init" when you really are
changing keys in the keywrap.

Can you check when and how often you pull "init"?

BTW: My memory fails me, which keywrap are we using - SIV och NIST
AES-keywrao SP 800-38F (also in RFC 3394, if I'm not mistaken)?

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Assured AB
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