[Cryptech Tech] Lattice boards for developing a custom master key memory
Joachim Strömbergson
joachim.strombergson at assured.se
Tue May 8 12:34:29 UTC 2018
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Aloha!
Thanks for good comments and suggestions.
Peter Stuge wrote:
> Joachim Strömbergson wrote:
>>> I like this idea, but I would definitely stick with a
>>> synchronous bus such as SPI.
>> What would you say are the main reasons for using SPI?
>
> It makes everything explicit.
>
> Timing and packet/message/command boundaries are each given an
> explicit signal, which allows for very clear and IMO simple
> behavior.
>
>
>> To me, a UART is simpler to not screw up.
>
> Perhaps the UART itself, but please also consider the layers above
> it.
>
> With a byte stream, all protocol state changes are data-dependant -
> timing and all boundaries are implicit. This makes it impossible to
> separate framing from message processing, essentially forcing a
> layering violation. :\
Good points.
I think we stick with the SPI interface. The current interface will need
to be updated a bit. The good thing is that the low level clock, data
in, data out part of it has been tested and used up to mbps speeds.
> I would like an asynchronous input and for any signal filtering to
> stay outside the MKM, in order to achieve the minimum tamper response
> time.
Hmm. Having board level filters is good suggestion. The two things that
I'm worried about are:
1. Glitches and unintended loss of master keys. If legitimate Cryptech
users loose their master key and thus all other keys, secrets protected
by the Cryptech HSM, the viability of the Cryptech HSM as a usaable
device will quite probably take a serious (fatal) dent. This must not
happen. We thus need to ensure that we can kill the master key. But not
make the system more vulnerable to glitches.
2. System state confusion. The MKM, esp as a somewhat smarter device
than a simple SRAM needs to know the state of the key (has it been set
or not, is it time to flip its bits to protect against remanence).
Pulling reset will cause state confusion. This however is a design
issue. We can design the FSM logic in such a way that if the key is
really gone, the FSM can know (and inform the rest of the system) about it.
So, 1 is much more important to ensure/solve than 2. If you (and Pavel)
think it can be solved asynchronously then ok.
- --
Med vänlig hälsning, Yours
Joachim Strömbergson - Assured AB
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