[Cryptech Tech] ICFO Introduction

[Carlos Abellan]

Hello Fredrik,

Thanks for your response and the links to the schematics. 

If I understand correctly, the “avalanche noise” generator is the entropy source that will be used in the current HSM design, right? Would you find interesting to generalise the concept of the entropy source component in the CrypTech project? (the idea being that additional entropy sources can be easily added/exchanged depending on who builds the module).

Also, are you working on “health monitoring” and “entropy estimation” for the raw RNG source? If so, where can I found the details of the procedure?

> Currently the only external noise source connected to the FPGA is an avalanche 
> noise based one. It provides input roughly on the order of 1.5 MHz to the FPGA 
> which, after conditioning, would be something on the order of 20 kbit/s of 
> entropy.

Is 20 kbit/s enough for an HSM module? Would the module benefit from a faster generation rate?

> What price point can you get to for such low speeds?

We have always developed for faster bitrates. If 20 kb/s is the speed requirement, we would simplify our current hardware to optimise cost.

Best,

Carlos