[Cryptech Tech] Comments on Alpha Board schematics

[Pavel Shatov]

On 25.01.2016 18:36, Joachim Strömbergson wrote:
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> Aloha!
>
> A comment on sheet 10. The primary use case for the high speed interface
> I have been talking about is for extraction of large amounts of data in
> reasonable time. Extracting GBytes of random number values for example.
>
> A secondary purpose would be to provide application access via something
> else than USB, for example fast Ethernet or GbE. This is feature creep
> however.
>
> One way to accomplish this is provide a header connected to pins on the
> FPGA. The pins selected on the FPGA must be fast enough to support a
> GMII interface. Then the actual interface with PHY can be added as a
> board connected to the header. A suitable MAC core with GMII inside the
> FPGA provides the interface to the CPU. Such cores are available from
> OpenCores for example.
>

Can one use RGMII instead of GMII? We currently have two 8-pin GPIO 
headers for FPGA, this is enough for RGMII, which is only 12 pins. 
Speaking of speed, Artix-7 I/O is fast enough, the only tricky thing is 
that receive clock should be routed to MRCC pin (independently of 
whether we use GMII or RGMII).


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With best regards,
Pavel Shatov