[Cryptech Tech] [Cryptech-Commits] [core/platform/novena] 21/21: Sick hacks to compensate for sparse MUX within TRNG core.

[Rob Austein]

At Tue, 29 Sep 2015 20:05:00 +0300, Pavel Shatov wrote:
> On 29.09.2015 15:12, Rob Austein wrote:
...
> >    don't need them be changed to have them and just ground internally?
> 
> Errr, I think, that adding dummy debug signals to cores, that don't 
> actually need them, is not the right decision. What are those debug 
> wires used for? Are they actually being used anywhere?

Sorry, that should have been "error wires", not "debug wires".

Most of the cores have a single wire port named "error", which feeds
into core_selector's sys_error output wire via the sys_error_mux
register.  ModExp and ModExpS6 don't have error ports, so the old
math_selector.v code explicitly zeros sys_error_mux to compensate.

Without claiming to understand the internal details of these cores, it
seems a bit improbable that two of the most complex cores we have are
the only ones that never encounter any error conditions.

Hacking configuration script to cope, for now.