[Cryptech Tech] NaCL in hardware

[Peter Schwabe]

Pavel Shatov <meisterpaul1 at yandex.ru> wrote:

Dear Pavel,

I'm including Michael Hutter in CC.

> I don't want to say, that this library is bad. It's great, it's huge amount
> of work, 

Thanks! :-)

> but it's oriented more towards ASICs than FPGAs, and again huge effort
> was made to make ASIC implementation cheap. As I see it, we have
> slightly different target, at least in the nearest future. Please
> correct me, if I'm wrong.

I agree. The CHES implementation is indeed highly optimized for low
power and low area and for ASICs. Are you planning to use exactly
crypto_box? In that case I could ask around whether a student would be
interested in optimizing it for your specific needs (high throughput,
exactly the FPGA you're using etc.).

Best regards,

Peter
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